Cleanup: Tabify and multi-column alignment for better readability.
This commit is contained in:
michaelangel007
parent
81ce9c54d1
commit
0e0e97e831
1 changed files with 143 additions and 141 deletions
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@ -1017,9 +1017,9 @@ BYTE __stdcall MemCheckPaging (WORD, WORD address, BYTE, BYTE, ULONG)
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void MemDestroy ()
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{
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//if (fastpaging)
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// MemSetFastPaging(0);
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// VirtualFree(memimage,MAX(0x30000,0x10000*1),MEM_DECOMMIT);
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//if (fastpaging)
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// MemSetFastPaging(0);
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// VirtualFree(memimage,MAX(0x30000,0x10000*1),MEM_DECOMMIT);
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VirtualFree(memaux ,0,MEM_RELEASE);
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VirtualFree(memmain ,0,MEM_RELEASE);
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@ -1215,13 +1215,13 @@ void MemInitialize()
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HRSRC hResInfo = NULL;
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switch (g_Apple2Type)
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{
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case A2TYPE_APPLE2: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_APPLE2_ROM), "ROM"); ROM_SIZE = Apple2RomSize; break;
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case A2TYPE_APPLE2PLUS: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_APPLE2_PLUS_ROM), "ROM"); ROM_SIZE = Apple2RomSize; break;
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case A2TYPE_APPLE2E: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_APPLE2E_ROM), "ROM"); ROM_SIZE = Apple2eRomSize; break;
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case A2TYPE_APPLE2: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_APPLE2_ROM ), "ROM"); ROM_SIZE = Apple2RomSize ; break;
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case A2TYPE_APPLE2PLUS: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_APPLE2_PLUS_ROM ), "ROM"); ROM_SIZE = Apple2RomSize ; break;
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case A2TYPE_APPLE2E: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_APPLE2E_ROM ), "ROM"); ROM_SIZE = Apple2eRomSize; break;
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case A2TYPE_APPLE2EENHANCED:hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_APPLE2E_ENHANCED_ROM), "ROM"); ROM_SIZE = Apple2eRomSize; break;
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case A2TYPE_PRAVETS82: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_PRAVETS_82_ROM), "ROM"); ROM_SIZE = Apple2RomSize; break;
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case A2TYPE_PRAVETS8M: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_PRAVETS_8M_ROM), "ROM"); ROM_SIZE = Apple2RomSize; break;
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case A2TYPE_PRAVETS8A: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_PRAVETS_8C_ROM), "ROM"); ROM_SIZE = Apple2eRomSize; break;
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case A2TYPE_PRAVETS82: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_PRAVETS_82_ROM ), "ROM"); ROM_SIZE = Apple2RomSize ; break;
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case A2TYPE_PRAVETS8M: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_PRAVETS_8M_ROM ), "ROM"); ROM_SIZE = Apple2RomSize ; break;
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case A2TYPE_PRAVETS8A: hResInfo = FindResource(NULL, MAKEINTRESOURCE(IDR_PRAVETS_8C_ROM ), "ROM"); ROM_SIZE = Apple2eRomSize; break;
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}
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if(hResInfo == NULL)
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@ -1229,14 +1229,14 @@ void MemInitialize()
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TCHAR sRomFileName[ MAX_PATH ];
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switch (g_Apple2Type)
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{
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case A2TYPE_APPLE2: _tcscpy(sRomFileName, TEXT("APPLE2.ROM")); break;
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case A2TYPE_APPLE2PLUS: _tcscpy(sRomFileName, TEXT("APPLE2_PLUS.ROM")); break;
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case A2TYPE_APPLE2E: _tcscpy(sRomFileName, TEXT("APPLE2E.ROM")); break;
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case A2TYPE_APPLE2: _tcscpy(sRomFileName, TEXT("APPLE2.ROM" )); break;
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case A2TYPE_APPLE2PLUS: _tcscpy(sRomFileName, TEXT("APPLE2_PLUS.ROM" )); break;
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case A2TYPE_APPLE2E: _tcscpy(sRomFileName, TEXT("APPLE2E.ROM" )); break;
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case A2TYPE_APPLE2EENHANCED:_tcscpy(sRomFileName, TEXT("APPLE2E_ENHANCED.ROM")); break;
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case A2TYPE_PRAVETS82: _tcscpy(sRomFileName, TEXT("PRAVETS82.ROM")); break;
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case A2TYPE_PRAVETS8M: _tcscpy(sRomFileName, TEXT("PRAVETS8M.ROM")); break;
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case A2TYPE_PRAVETS8A: _tcscpy(sRomFileName, TEXT("PRAVETS8C.ROM")); break;
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default:
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case A2TYPE_PRAVETS82: _tcscpy(sRomFileName, TEXT("PRAVETS82.ROM" )); break;
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case A2TYPE_PRAVETS8M: _tcscpy(sRomFileName, TEXT("PRAVETS8M.ROM" )); break;
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case A2TYPE_PRAVETS8A: _tcscpy(sRomFileName, TEXT("PRAVETS8C.ROM" )); break;
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default:
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{
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_tcscpy(sRomFileName, TEXT("Unknown type!"));
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REGSAVE(TEXT(REGVALUE_APPLE2_TYPE), A2TYPE_APPLE2EENHANCED);
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@ -1392,11 +1392,12 @@ void MemReset ()
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}
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}
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// https://github.com/AppleWin/AppleWin/issues/206
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// On a real Apple the RNDL and RNDH are initialized to random values from a cold boot.
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DWORD clock = timeGetTime(); // We can't use g_nCumulativeCycles as it will be zero on a fresh execution.
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memmain[ 0x4E ] = (clock >> 0) & 0xFF;
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memmain[ 0x4F ] = (clock >> 8) & 0xFF;
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// https://github.com/AppleWin/AppleWin/issues/206
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// On a real Apple the RNDL and RNDH are initialized to random values from a cold boot.
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// TODO: Use MemReturnRandomData() ???
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DWORD clock = timeGetTime(); // We can't use g_nCumulativeCycles as it will be zero on a fresh execution.
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memmain[ 0x4E ] = (clock >> 0) & 0xFF;
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memmain[ 0x4F ] = (clock >> 8) & 0xFF;
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// SET UP THE MEMORY IMAGE
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mem = memimage;
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@ -1420,8 +1421,8 @@ void MemReset ()
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// . Snapshot_LoadState()
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void MemResetPaging ()
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{
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ResetPaging(0);
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if (g_Apple2Type == A2TYPE_PRAVETS8A)
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ResetPaging(0);
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if (g_Apple2Type == A2TYPE_PRAVETS8A)
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{
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P8CAPS_ON = false;
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TapeWrite (0, 0, 0, 0 ,0);
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@ -1432,30 +1433,31 @@ void MemResetPaging ()
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//===========================================================================
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// Called by Disk][ I/O only
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BYTE MemReturnRandomData (BYTE highbit)
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BYTE MemReturnRandomData(BYTE highbit)
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{
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static const BYTE retval[16] = {0x00,0x2D,0x2D,0x30,0x30,0x32,0x32,0x34,
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0x35,0x39,0x43,0x43,0x43,0x60,0x7F,0x7F};
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BYTE r = (BYTE)(rand() & 0xFF);
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if (r <= 170)
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return 0x20 | (highbit ? 0x80 : 0);
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else
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return retval[r & 15] | (highbit ? 0x80 : 0);
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static const BYTE retval[16] = {
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0x00,0x2D,0x2D,0x30,0x30,0x32,0x32,0x34,
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0x35,0x39,0x43,0x43,0x43,0x60,0x7F,0x7F };
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BYTE r = (BYTE)(rand() & 0xFF);
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if (r <= 170)
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return 0x20 | (highbit ? 0x80 : 0);
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else
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return retval[r & 15] | (highbit ? 0x80 : 0);
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}
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//===========================================================================
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BYTE MemReadFloatingBus(const ULONG uExecutedCycles)
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{
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return*(LPBYTE)(mem + VideoGetScannerAddress(NULL, uExecutedCycles));
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return*(LPBYTE)(mem + VideoGetScannerAddress(NULL, uExecutedCycles));
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}
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//===========================================================================
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BYTE MemReadFloatingBus(const BYTE highbit, const ULONG uExecutedCycles)
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{
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BYTE r = *(LPBYTE)(mem + VideoGetScannerAddress(NULL, uExecutedCycles));
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return (r & ~0x80) | ((highbit) ? 0x80 : 0);
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BYTE r = *(LPBYTE)(mem + VideoGetScannerAddress(NULL, uExecutedCycles));
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return (r & ~0x80) | ((highbit) ? 0x80 : 0);
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}
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//===========================================================================
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@ -1514,128 +1516,128 @@ static void DebugFlip(WORD address, ULONG nCyclesLeft)
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BYTE __stdcall MemSetPaging (WORD programcounter, WORD address, BYTE write, BYTE value, ULONG nCyclesLeft)
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{
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address &= 0xFF;
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DWORD lastmemmode = memmode;
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address &= 0xFF;
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DWORD lastmemmode = memmode;
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#if defined(_DEBUG) && defined(DEBUG_FLIP_TIMINGS)
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DebugFlip(address, nCyclesLeft);
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DebugFlip(address, nCyclesLeft);
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#endif
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// DETERMINE THE NEW MEMORY PAGING MODE.
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if ((address >= 0x80) && (address <= 0x8F))
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{
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BOOL writeram = (address & 1);
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SetMemMode(memmode & ~(MF_BANK2 | MF_HIGHRAM | MF_WRITERAM));
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lastwriteram = 1; // note: because diags.do doesn't set switches twice!
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if (lastwriteram && writeram)
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SetMemMode(memmode | MF_WRITERAM);
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if (!(address & 8))
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SetMemMode(memmode | MF_BANK2);
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if (((address & 2) >> 1) == (address & 1))
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SetMemMode(memmode | MF_HIGHRAM);
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lastwriteram = writeram;
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}
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else if (!IS_APPLE2)
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{
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switch (address)
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// DETERMINE THE NEW MEMORY PAGING MODE.
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if ((address >= 0x80) && (address <= 0x8F))
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{
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case 0x00: SetMemMode(memmode & ~MF_80STORE); break;
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case 0x01: SetMemMode(memmode | MF_80STORE); break;
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case 0x02: SetMemMode(memmode & ~MF_AUXREAD); break;
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case 0x03: SetMemMode(memmode | MF_AUXREAD); break;
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case 0x04: SetMemMode(memmode & ~MF_AUXWRITE); break;
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case 0x05: SetMemMode(memmode | MF_AUXWRITE); break;
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case 0x06: SetMemMode(memmode | MF_SLOTCXROM); break;
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case 0x07: SetMemMode(memmode & ~MF_SLOTCXROM); break;
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case 0x08: SetMemMode(memmode & ~MF_ALTZP); break;
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case 0x09: SetMemMode(memmode | MF_ALTZP); break;
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case 0x0A: SetMemMode(memmode & ~MF_SLOTC3ROM); break;
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case 0x0B: SetMemMode(memmode | MF_SLOTC3ROM); break;
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case 0x54: SetMemMode(memmode & ~MF_PAGE2); break;
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case 0x55: SetMemMode(memmode | MF_PAGE2); break;
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case 0x56: SetMemMode(memmode & ~MF_HIRES); break;
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case 0x57: SetMemMode(memmode | MF_HIRES); break;
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BOOL writeram = (address & 1);
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SetMemMode(memmode & ~(MF_BANK2 | MF_HIGHRAM | MF_WRITERAM));
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lastwriteram = 1; // note: because diags.do doesn't set switches twice!
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if (lastwriteram && writeram)
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SetMemMode(memmode | MF_WRITERAM);
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if (!(address & 8))
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SetMemMode(memmode | MF_BANK2);
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if (((address & 2) >> 1) == (address & 1))
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SetMemMode(memmode | MF_HIGHRAM);
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lastwriteram = writeram;
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}
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else if (!IS_APPLE2)
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{
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switch (address)
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{
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case 0x00: SetMemMode(memmode & ~MF_80STORE); break;
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case 0x01: SetMemMode(memmode | MF_80STORE); break;
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case 0x02: SetMemMode(memmode & ~MF_AUXREAD); break;
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case 0x03: SetMemMode(memmode | MF_AUXREAD); break;
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case 0x04: SetMemMode(memmode & ~MF_AUXWRITE); break;
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case 0x05: SetMemMode(memmode | MF_AUXWRITE); break;
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case 0x06: SetMemMode(memmode | MF_SLOTCXROM); break;
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case 0x07: SetMemMode(memmode & ~MF_SLOTCXROM); break;
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case 0x08: SetMemMode(memmode & ~MF_ALTZP); break;
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case 0x09: SetMemMode(memmode | MF_ALTZP); break;
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case 0x0A: SetMemMode(memmode & ~MF_SLOTC3ROM); break;
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case 0x0B: SetMemMode(memmode | MF_SLOTC3ROM); break;
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case 0x54: SetMemMode(memmode & ~MF_PAGE2); break;
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case 0x55: SetMemMode(memmode | MF_PAGE2); break;
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case 0x56: SetMemMode(memmode & ~MF_HIRES); break;
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case 0x57: SetMemMode(memmode | MF_HIRES); break;
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#ifdef RAMWORKS
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case 0x71: // extended memory aux page number
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case 0x73: // Ramworks III set aux page number
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if ((value < g_uMaxExPages) && RWpages[value])
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{
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memaux = RWpages[value];
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//memmode &= ~MF_RWPMASK;
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//memmode |= value;
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//if (fastpaging)
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// UpdateFastPaging();
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//else
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UpdatePaging(0,0);
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}
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break;
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case 0x71: // extended memory aux page number
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case 0x73: // Ramworks III set aux page number
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if ((value < g_uMaxExPages) && RWpages[value])
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{
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memaux = RWpages[value];
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//memmode &= ~MF_RWPMASK;
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//memmode |= value;
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//if (fastpaging)
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// UpdateFastPaging();
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//else
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UpdatePaging(0,0);
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}
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break;
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#endif
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}
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}
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}
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// IF THE EMULATED PROGRAM HAS JUST UPDATE THE MEMORY WRITE MODE AND IS
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// ABOUT TO UPDATE THE MEMORY READ MODE, HOLD OFF ON ANY PROCESSING UNTIL
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// IT DOES SO.
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//
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// NB. A 6502 interrupt occurring between these memory write & read updates could lead to incorrect behaviour.
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// - although any date-race is probably a bug in the 6502 code too.
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if ((address >= 4) && (address <= 5) &&
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((*(LPDWORD)(mem+programcounter) & 0x00FFFEFF) == 0x00C0028D)) {
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modechanging = 1;
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return write ? 0 : MemReadFloatingBus(1, nCyclesLeft);
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}
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if ((address >= 0x80) && (address <= 0x8F) && (programcounter < 0xC000) &&
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(((*(LPDWORD)(mem+programcounter) & 0x00FFFEFF) == 0x00C0048D) ||
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((*(LPDWORD)(mem+programcounter) & 0x00FFFEFF) == 0x00C0028D))) {
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modechanging = 1;
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return write ? 0 : MemReadFloatingBus(1, nCyclesLeft);
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}
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// IF THE EMULATED PROGRAM HAS JUST UPDATE THE MEMORY WRITE MODE AND IS
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// ABOUT TO UPDATE THE MEMORY READ MODE, HOLD OFF ON ANY PROCESSING UNTIL
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// IT DOES SO.
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//
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// NB. A 6502 interrupt occurring between these memory write & read updates could lead to incorrect behaviour.
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// - although any date-race is probably a bug in the 6502 code too.
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if ((address >= 4) && (address <= 5) &&
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((*(LPDWORD)(mem+programcounter) & 0x00FFFEFF) == 0x00C0028D)) {
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modechanging = 1;
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return write ? 0 : MemReadFloatingBus(1, nCyclesLeft);
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}
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if ((address >= 0x80) && (address <= 0x8F) && (programcounter < 0xC000) &&
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(((*(LPDWORD)(mem+programcounter) & 0x00FFFEFF) == 0x00C0048D) ||
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((*(LPDWORD)(mem+programcounter) & 0x00FFFEFF) == 0x00C0028D))) {
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modechanging = 1;
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return write ? 0 : MemReadFloatingBus(1, nCyclesLeft);
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}
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// IF THE MEMORY PAGING MODE HAS CHANGED, UPDATE OUR MEMORY IMAGES AND
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// WRITE TABLES.
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if ((lastmemmode != memmode) || modechanging)
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{
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modechanging = 0;
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if ((lastmemmode & MF_SLOTCXROM) != (memmode & MF_SLOTCXROM))
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// IF THE MEMORY PAGING MODE HAS CHANGED, UPDATE OUR MEMORY IMAGES AND
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// WRITE TABLES.
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if ((lastmemmode != memmode) || modechanging)
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{
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if (SW_SLOTCXROM)
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modechanging = 0;
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if ((lastmemmode & MF_SLOTCXROM) != (memmode & MF_SLOTCXROM))
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{
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// Disable Internal ROM
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// . Similar to $CFFF access
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// . None of the peripheral cards can be driving the bus - so use the null ROM
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memset(pCxRomPeripheral+0x800, 0, FIRMWARE_EXPANSION_SIZE);
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memset(mem+FIRMWARE_EXPANSION_BEGIN, 0, FIRMWARE_EXPANSION_SIZE);
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g_eExpansionRomType = eExpRomNull;
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g_uPeripheralRomSlot = 0;
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IoHandlerCardsIn();
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}
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else
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{
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// Enable Internal ROM
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memcpy(mem+0xC800, pCxRomInternal+0x800, FIRMWARE_EXPANSION_SIZE);
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g_eExpansionRomType = eExpRomInternal;
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g_uPeripheralRomSlot = 0;
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IoHandlerCardsOut();
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if (SW_SLOTCXROM)
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{
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// Disable Internal ROM
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// . Similar to $CFFF access
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// . None of the peripheral cards can be driving the bus - so use the null ROM
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memset(pCxRomPeripheral+0x800, 0, FIRMWARE_EXPANSION_SIZE);
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memset(mem+FIRMWARE_EXPANSION_BEGIN, 0, FIRMWARE_EXPANSION_SIZE);
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g_eExpansionRomType = eExpRomNull;
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g_uPeripheralRomSlot = 0;
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IoHandlerCardsIn();
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}
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else
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{
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// Enable Internal ROM
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memcpy(mem+0xC800, pCxRomInternal+0x800, FIRMWARE_EXPANSION_SIZE);
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g_eExpansionRomType = eExpRomInternal;
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g_uPeripheralRomSlot = 0;
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IoHandlerCardsOut();
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}
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}
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//// IF FAST PAGING IS ACTIVE, WE KEEP MULTIPLE COMPLETE MEMORY IMAGES
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//// AND WRITE TABLES, AND SWITCH BETWEEN THEM. THE FAST PAGING VERSION
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//// OF THE CPU EMULATOR KEEPS ALL OF THE IMAGES COHERENT.
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//if (fastpaging)
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// UpdateFastPaging();
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// IF FAST PAGING IS NOT ACTIVE THEN WE KEEP ONLY ONE MEMORY IMAGE AND
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// WRITE TABLE, AND UPDATE THEM EVERY TIME PAGING IS CHANGED.
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//else
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UpdatePaging(0,0);
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}
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//// IF FAST PAGING IS ACTIVE, WE KEEP MULTIPLE COMPLETE MEMORY IMAGES
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//// AND WRITE TABLES, AND SWITCH BETWEEN THEM. THE FAST PAGING VERSION
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//// OF THE CPU EMULATOR KEEPS ALL OF THE IMAGES COHERENT.
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//if (fastpaging)
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// UpdateFastPaging();
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if ((address <= 1) || ((address >= 0x54) && (address <= 0x57)))
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return VideoSetMode(programcounter,address,write,value,nCyclesLeft);
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// IF FAST PAGING IS NOT ACTIVE THEN WE KEEP ONLY ONE MEMORY IMAGE AND
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// WRITE TABLE, AND UPDATE THEM EVERY TIME PAGING IS CHANGED.
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//else
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UpdatePaging(0,0);
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}
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|
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if ((address <= 1) || ((address >= 0x54) && (address <= 0x57)))
|
||||
return VideoSetMode(programcounter,address,write,value,nCyclesLeft);
|
||||
|
||||
return write ? 0 : MemReadFloatingBus(nCyclesLeft);
|
||||
return write ? 0 : MemReadFloatingBus(nCyclesLeft);
|
||||
}
|
||||
|
||||
//===========================================================================
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue