Merge remote-tracking branch 'upstream/master'
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commit
78ef2cc23c
9 changed files with 46 additions and 21 deletions
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@ -9,6 +9,13 @@ https://github.com/AppleWin/AppleWin/issues/new
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Tom Charlesworth
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1.28.6.0 - 1 Jun 2019
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---------------------
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. [Bug #651] Cycle-accurate interrupts:
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- Interrupts sources are checked after every opcode (full-speed after every 40 opcodes).
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- 6522 TIMERs in free-running mode now account for the underflowed cycles when resetting the count.
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1.28.5.0 - 6 Apr 2019
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---------------------
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. [Change #631] Improvements for the RGB AppleColor card:
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@ -1,4 +1,4 @@
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#define APPLEWIN_VERSION 1,28,5,0
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#define APPLEWIN_VERSION 1,28,6,0
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#define xstr(a) str(a)
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#define str(a) #a
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@ -130,12 +130,7 @@ regsrec regs;
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unsigned __int64 g_nCumulativeCycles = 0;
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static ULONG g_nCyclesExecuted; // # of cycles executed up to last IO access
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//static signed long g_uInternalExecutedCycles;
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// TODO: Use IRQ_CHECK_TIMEOUT=128 when running at full-speed else with IRQ_CHECK_TIMEOUT=1
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// - What about when running benchmark?
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static const int IRQ_CHECK_TIMEOUT = 128;
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static signed int g_nIrqCheckTimeout = IRQ_CHECK_TIMEOUT;
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//
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@ -417,21 +412,29 @@ static __forceinline void IRQ(ULONG& uExecutedCycles, BOOL& flagc, BOOL& flagn,
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}
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}
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static __forceinline void CheckInterruptSources(ULONG uExecutedCycles)
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const int IRQ_CHECK_OPCODE_FULL_SPEED = 40; // ~128 cycles (assume 3 cycles per opcode)
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static int g_fullSpeedOpcodeCount = IRQ_CHECK_OPCODE_FULL_SPEED;
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static __forceinline void CheckInterruptSources(ULONG uExecutedCycles, const bool bVideoUpdate)
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{
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if (g_nIrqCheckTimeout < 0)
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if (!bVideoUpdate)
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{
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MB_UpdateCycles(uExecutedCycles);
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sg_Mouse.SetVBlank( !VideoGetVblBar(uExecutedCycles) );
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g_nIrqCheckTimeout = IRQ_CHECK_TIMEOUT;
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g_fullSpeedOpcodeCount--;
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if (g_fullSpeedOpcodeCount >= 0)
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return;
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g_fullSpeedOpcodeCount = IRQ_CHECK_OPCODE_FULL_SPEED;
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}
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MB_UpdateCycles(uExecutedCycles);
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sg_Mouse.SetVBlank( !VideoGetVblBar(uExecutedCycles) );
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}
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// GH#608: IRQ needs to occur within 17 cycles (6 opcodes) of configuring the timer interrupt
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void CpuAdjustIrqCheck(UINT uCyclesUntilInterrupt)
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{
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if (uCyclesUntilInterrupt < IRQ_CHECK_TIMEOUT)
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g_nIrqCheckTimeout = uCyclesUntilInterrupt;
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const UINT opcodesUntilInterrupt = uCyclesUntilInterrupt/3; // assume 3 cycles per opcode
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if (g_bFullSpeed && opcodesUntilInterrupt < IRQ_CHECK_OPCODE_FULL_SPEED)
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g_fullSpeedOpcodeCount = opcodesUntilInterrupt;
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}
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//===========================================================================
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@ -318,7 +318,7 @@ static DWORD Cpu6502(DWORD uTotalCycles, const bool bVideoUpdate)
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#undef $
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}
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CheckInterruptSources(uExecutedCycles);
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CheckInterruptSources(uExecutedCycles, bVideoUpdate);
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NMI(uExecutedCycles, flagc, flagn, flagv, flagz);
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IRQ(uExecutedCycles, flagc, flagn, flagv, flagz);
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@ -321,7 +321,7 @@ static DWORD Cpu65C02(DWORD uTotalCycles, const bool bVideoUpdate)
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#undef $
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}
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CheckInterruptSources(uExecutedCycles);
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CheckInterruptSources(uExecutedCycles, bVideoUpdate);
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NMI(uExecutedCycles, flagc, flagn, flagv, flagz);
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IRQ(uExecutedCycles, flagc, flagn, flagv, flagz);
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@ -406,7 +406,7 @@ static DWORD Cpu65D02(DWORD uTotalCycles, const bool bVideoUpdate)
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}
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#undef $
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CheckInterruptSources(uExecutedCycles);
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CheckInterruptSources(uExecutedCycles, bVideoUpdate);
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NMI(uExecutedCycles, flagc, flagn, flagv, flagz);
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IRQ(uExecutedCycles, flagc, flagn, flagv, flagz);
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@ -49,7 +49,7 @@ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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| (flagz ? AF_ZERO : 0) \
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| AF_RESERVED | AF_BREAK;
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// CYC(a): This can be optimised, as only certain opcodes will affect uExtraCycles
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#define CYC(a) uExecutedCycles += (a)+uExtraCycles; g_nIrqCheckTimeout -= (a)+uExtraCycles;
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#define CYC(a) uExecutedCycles += (a)+uExtraCycles;
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#define POP (*(mem+((regs.sp >= 0x1FF) ? (regs.sp = 0x100) : ++regs.sp)))
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#define PUSH(a) *(mem+regs.sp--) = (a); \
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if (regs.sp < 0x100) \
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@ -1797,11 +1797,19 @@ void MB_UpdateCycles(ULONG uExecutedCycles)
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{
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// Free-running mode
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// - Ultima4/5 change ACCESS_TIMER1 after a couple of IRQs into tune
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pMB->sy6522.TIMER1_COUNTER.w = pMB->sy6522.TIMER1_LATCH.w;
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pMB->sy6522.TIMER1_COUNTER.w += pMB->sy6522.TIMER1_LATCH.w; // GH#651: account for underflowed cycles too
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if (pMB->sy6522.TIMER1_COUNTER.w > pMB->sy6522.TIMER1_LATCH.w)
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{
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if (pMB->sy6522.TIMER1_LATCH.w)
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pMB->sy6522.TIMER1_COUNTER.w %= pMB->sy6522.TIMER1_LATCH.w; // Only occurs if LATCH.w<0x0007 (# cycles for longest opcode)
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else
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pMB->sy6522.TIMER1_COUNTER.w = 0;
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}
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StartTimer1(pMB);
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}
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}
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else if (pMB->bTimer2Active && bTimer2Underflow)
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if (pMB->bTimer2Active && bTimer2Underflow)
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{
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UpdateIFR(pMB, 0, IxR_TIMER2);
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@ -1811,7 +1819,14 @@ void MB_UpdateCycles(ULONG uExecutedCycles)
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}
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else
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{
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pMB->sy6522.TIMER2_COUNTER.w = pMB->sy6522.TIMER2_LATCH.w;
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pMB->sy6522.TIMER2_COUNTER.w += pMB->sy6522.TIMER2_LATCH.w;
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if (pMB->sy6522.TIMER2_COUNTER.w > pMB->sy6522.TIMER2_LATCH.w)
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{
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if (pMB->sy6522.TIMER2_LATCH.w)
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pMB->sy6522.TIMER2_COUNTER.w %= pMB->sy6522.TIMER2_LATCH.w;
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else
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pMB->sy6522.TIMER2_COUNTER.w = 0;
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}
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StartTimer2(pMB);
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}
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}
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@ -54,7 +54,7 @@ static __forceinline void DoIrqProfiling(DWORD uCycles)
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{
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}
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static __forceinline void CheckInterruptSources(ULONG uExecutedCycles)
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static __forceinline void CheckInterruptSources(ULONG uExecutedCycles, const bool bVideoUpdate)
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{
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}
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