Fixed 6522.T2 interrupt for Lancaster (#765)
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2f9ba13216
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1 changed files with 4 additions and 20 deletions
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@ -446,7 +446,7 @@ static void SY6522_Write(BYTE nDevice, BYTE nReg, BYTE nValue)
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// Clear Timer2 Interrupt Flag.
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// Clear Timer2 Interrupt Flag.
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UpdateIFR(pMB, IxR_TIMER2);
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UpdateIFR(pMB, IxR_TIMER2);
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pMB->sy6522.TIMER2_LATCH.h = nValue;
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pMB->sy6522.TIMER2_LATCH.h = nValue; // NB. Real 6522 doesn't have TIMER2_LATCH.h
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pMB->sy6522.TIMER2_COUNTER.w = pMB->sy6522.TIMER2_LATCH.w;
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pMB->sy6522.TIMER2_COUNTER.w = pMB->sy6522.TIMER2_LATCH.w;
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StartTimer2(pMB);
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StartTimer2(pMB);
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@ -488,11 +488,9 @@ static void SY6522_Write(BYTE nDevice, BYTE nReg, BYTE nValue)
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UpdateIFR(pMB, 0);
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UpdateIFR(pMB, 0);
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// Check if a timer interrupt has been enabled (regardless of if there's an active timer or not): GH#567
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// Check if a timer interrupt has been enabled (regardless of if there's an active timer or not): GH#567
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// . NB. Not Timer2 - only TIMER2H can make it active (GH#765)
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if (pMB->sy6522.IER & IxR_TIMER1)
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if (pMB->sy6522.IER & IxR_TIMER1)
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StartTimer1(pMB);
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StartTimer1(pMB);
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if (pMB->sy6522.IER & IxR_TIMER2)
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StartTimer2(pMB);
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}
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}
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break;
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break;
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case 0x0f: // ORA_NO_HS
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case 0x0f: // ORA_NO_HS
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@ -1934,22 +1932,8 @@ bool MB_UpdateCycles(ULONG uExecutedCycles)
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{
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{
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UpdateIFR(pMB, 0, IxR_TIMER2);
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UpdateIFR(pMB, 0, IxR_TIMER2);
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if((pMB->sy6522.ACR & RUNMODE) == RM_ONESHOT)
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// TIMER2 only runs in one-shot mode
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{
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StopTimer2(pMB);
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StopTimer2(pMB);
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}
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else
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{
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pMB->sy6522.TIMER2_COUNTER.w += pMB->sy6522.TIMER2_LATCH.w;
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if (pMB->sy6522.TIMER2_COUNTER.w > pMB->sy6522.TIMER2_LATCH.w)
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{
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if (pMB->sy6522.TIMER2_LATCH.w)
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pMB->sy6522.TIMER2_COUNTER.w %= pMB->sy6522.TIMER2_LATCH.w;
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else
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pMB->sy6522.TIMER2_COUNTER.w = 0;
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}
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StartTimer2(pMB);
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}
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}
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}
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}
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}
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