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9515e7de2d
AppleWin
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source
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CPU
History
tomcw
42d265a25c
Fixed timing for 6502 opcodes: rol abs,x; lsr abs,x; ror abs,x. (
Fixes
#801
)
2020-06-19 19:40:23 +01:00
..
cpu65C02.h
Check interrupt sources after every opcode when in normal speed. (
#651
)
2019-06-01 16:54:58 +01:00
cpu65d02.h
Check interrupt sources after every opcode when in normal speed. (
#651
)
2019-06-01 16:54:58 +01:00
cpu6502.h
Fixed timing for 6502 opcodes: rol abs,x; lsr abs,x; ror abs,x. (
Fixes
#801
)
2020-06-19 19:40:23 +01:00
cpu_general.inl
Full-speed: only do interrupt checking every 40 opcodes & simplify CYC macro (
#651
)
2019-06-02 14:30:54 +01:00
cpu_instructions.inl
Manual merge from master @
c798157
2016-03-21 23:48:02 +00:00