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CPU: Fixed BRK/COP instructions (read + ignore the signature byte)

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This commit is contained in:
Sour 2019-03-02 20:26:14 -05:00
parent 3cfb3f7f25
commit 25837e5c71
5 changed files with 40 additions and 41 deletions
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4
Core/Cpu.cpp
View file

@ -29,9 +29,9 @@ void Cpu::Exec()
_immediateMode = false;
switch(GetOpCode()) {
case 0x00: BRK(); break;
case 0x00: AddrMode_Imm8(); BRK(); break;
case 0x01: AddrMode_DirIdxIndX(); ORA(); break;
case 0x02: COP(); break;
case 0x02: AddrMode_Imm8(); COP(); break;
case 0x03: AddrMode_StkRel(); ORA(); break;
case 0x04: AddrMode_Dir(); TSB(); break;
case 0x05: AddrMode_Dir(); ORA(); break;

3
Core/Cpu.h
View file

@ -40,9 +40,6 @@ private:
bool _nmiFlag;
uint8_t _irqSource;
Func _opTable[256];
AddrMode _addrMode[256];
uint32_t GetProgramAddress(uint16_t addr);
uint32_t GetDataAddress(uint16_t addr);

34
Core/CpuTypes.h
View file

@ -52,40 +52,6 @@ namespace ProcFlags
};
}
enum class AddrMode : uint8_t
{
Imm8,
Imm16,
ImmX,
ImmM,
Abs,
AbsIdxXInd, //JMP/JSR only
AbsIdxX,
AbsIdxY,
AbsInd, //JMP only
AbsIndLng, //JML only
AbsLngIdxX,
AbsLng,
AbsJmp, //JSR/JMP only
AbsLngJmp, //JSL/JMP only
Acc,
BlkMov,
DirIdxIndX,
DirIdxX,
DirIdxY,
DirIndIdxY,
DirIndLngIdxY,
DirIndLng,
DirInd,
Dir,
Imp,
RelLng,
Rel,
Stk,
StkRel,
StkRelIndIdxY
};
enum class MemoryOperationType
{
Read = 0,

6
Core/DisassemblyInfo.cpp
View file

@ -75,7 +75,8 @@ void DisassemblyInfo::GetDisassembly(string &out, uint32_t memoryAddr)
str.Write('#', operand);
break;
case AddrMode::Imp: break;;
case AddrMode::Sig8: //BRK/COP signature, ignore them
case AddrMode::Imp: break;
case AddrMode::RelLng: str.Write(operand);
case AddrMode::Rel: str.Write(operand);
case AddrMode::Stk: break;
@ -131,6 +132,7 @@ uint8_t DisassemblyInfo::GetOperandSize(AddrMode addrMode, uint8_t flags)
case AddrMode::DirIndLng:
case AddrMode::DirInd:
case AddrMode::Dir:
case AddrMode::Sig8:
case AddrMode::Imm8:
case AddrMode::Rel:
case AddrMode::StkRel:
@ -238,7 +240,7 @@ string DisassemblyInfo::OpName[256] = {
typedef AddrMode M;
AddrMode DisassemblyInfo::OpMode[256] = {
//0 1 2 3 4 5 6 7 8 9 A B C D E F
M::Stk, M::DirIdxIndX, M::Stk, M::StkRel, M::Dir, M::Dir, M::Dir, M::DirIndLng, M::Stk, M::ImmM, M::Acc, M::Stk, M::Abs, M::Abs, M::Abs, M::AbsLng, // 0
M::Sig8, M::DirIdxIndX, M::Sig8, M::StkRel, M::Dir, M::Dir, M::Dir, M::DirIndLng, M::Stk, M::ImmM, M::Acc, M::Stk, M::Abs, M::Abs, M::Abs, M::AbsLng, // 0
M::Rel, M::DirIndIdxY, M::DirInd, M::StkRelIndIdxY, M::Dir, M::DirIdxX, M::DirIdxX, M::DirIndLngIdxY, M::Imp, M::AbsIdxY, M::Acc, M::Imp, M::Abs, M::AbsIdxX, M::AbsIdxX, M::AbsLngIdxX, // 1
M::Abs, M::DirIdxIndX, M::AbsLng, M::StkRel, M::Dir, M::Dir, M::Dir, M::DirIndLng, M::Stk, M::ImmM, M::Acc, M::Stk, M::Abs, M::Abs, M::Abs, M::AbsLng, // 2
M::Rel, M::DirIndIdxY, M::DirInd, M::StkRelIndIdxY, M::DirIdxX, M::DirIdxX, M::DirIdxX, M::DirIndLngIdxY, M::Imp, M::AbsIdxY, M::Acc, M::Imp, M::AbsIdxX, M::AbsIdxX, M::AbsIdxX, M::AbsLngIdxX, // 3

34
Core/DisassemblyInfo.h
View file

@ -41,3 +41,37 @@ public:
uint16_t GetMemoryValue(uint32_t effectiveAddress, MemoryManager *memoryManager, uint8_t &valueSize);
};
enum class AddrMode : uint8_t
{
Sig8,
Imm8,
Imm16,
ImmX,
ImmM,
Abs,
AbsIdxXInd, //JMP/JSR only
AbsIdxX,
AbsIdxY,
AbsInd, //JMP only
AbsIndLng, //JML only
AbsLngIdxX,
AbsLng,
AbsJmp, //JSR/JMP only
AbsLngJmp, //JSL/JMP only
Acc,
BlkMov,
DirIdxIndX,
DirIdxX,
DirIdxY,
DirIndIdxY,
DirIndLngIdxY,
DirIndLng,
DirInd,
Dir,
Imp,
RelLng,
Rel,
Stk,
StkRel,
StkRelIndIdxY
};