PPU: Implemented PPU1/2 open bus
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parent
348da3879b
commit
94370b3226
2 changed files with 39 additions and 14 deletions
48
Core/Ppu.cpp
48
Core/Ppu.cpp
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@ -1139,9 +1139,17 @@ uint16_t Ppu::GetVramAddress()
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uint8_t Ppu::Read(uint16_t addr)
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uint8_t Ppu::Read(uint16_t addr)
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{
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{
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switch(addr) {
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switch(addr) {
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case 0x2134: return ((int16_t)_mode7.Matrix[0] * ((int16_t)_mode7.Matrix[1] >> 8)) & 0xFF;
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case 0x2134:
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case 0x2135: return (((int16_t)_mode7.Matrix[0] * ((int16_t)_mode7.Matrix[1] >> 8)) >> 8) & 0xFF;
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_ppu1OpenBus = ((int16_t)_mode7.Matrix[0] * ((int16_t)_mode7.Matrix[1] >> 8)) & 0xFF;
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case 0x2136: return (((int16_t)_mode7.Matrix[0] * ((int16_t)_mode7.Matrix[1] >> 8)) >> 16) & 0xFF;
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return _ppu1OpenBus;
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case 0x2135:
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_ppu1OpenBus = (((int16_t)_mode7.Matrix[0] * ((int16_t)_mode7.Matrix[1] >> 8)) >> 8) & 0xFF;
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return _ppu1OpenBus;
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case 0x2136:
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_ppu1OpenBus = (((int16_t)_mode7.Matrix[0] * ((int16_t)_mode7.Matrix[1] >> 8)) >> 16) & 0xFF;
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return _ppu1OpenBus;
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case 0x2137:
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case 0x2137:
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//SLHV - Software Latch for H/V Counter
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//SLHV - Software Latch for H/V Counter
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@ -1160,6 +1168,7 @@ uint8_t Ppu::Read(uint16_t addr)
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_console->ProcessPpuRead(0x200 | (_internalOamAddress & 0x1F), value, SnesMemoryType::SpriteRam);
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_console->ProcessPpuRead(0x200 | (_internalOamAddress & 0x1F), value, SnesMemoryType::SpriteRam);
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}
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}
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_internalOamAddress = (_internalOamAddress + 1) & 0x3FF;
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_internalOamAddress = (_internalOamAddress + 1) & 0x3FF;
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_ppu1OpenBus = value;
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return value;
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return value;
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}
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}
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@ -1171,6 +1180,7 @@ uint8_t Ppu::Read(uint16_t addr)
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UpdateVramReadBuffer();
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UpdateVramReadBuffer();
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_vramAddress = (_vramAddress + _vramIncrementValue) & 0x7FFF;
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_vramAddress = (_vramAddress + _vramIncrementValue) & 0x7FFF;
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}
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}
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_ppu1OpenBus = returnValue;
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return returnValue;
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return returnValue;
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}
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}
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@ -1182,14 +1192,19 @@ uint8_t Ppu::Read(uint16_t addr)
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UpdateVramReadBuffer();
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UpdateVramReadBuffer();
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_vramAddress = (_vramAddress + _vramIncrementValue) & 0x7FFF;
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_vramAddress = (_vramAddress + _vramIncrementValue) & 0x7FFF;
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}
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}
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_ppu1OpenBus = returnValue;
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return returnValue;
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return returnValue;
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}
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}
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case 0x213B: {
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case 0x213B: {
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//CGDATAREAD - CGRAM Data read
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//CGDATAREAD - CGRAM Data read
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uint8_t value = _cgram[_cgramAddress];
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uint8_t value = _cgram[_cgramAddress];
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if(_cgramAddress & 0x01) {
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value = (value & 0x7F) | (_ppu2OpenBus & 0x80);
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}
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_console->ProcessPpuRead(_cgramAddress, value, SnesMemoryType::CGRam);
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_console->ProcessPpuRead(_cgramAddress, value, SnesMemoryType::CGRam);
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_cgramAddress = (_cgramAddress + 1) & (Ppu::CgRamSize - 1);
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_cgramAddress = (_cgramAddress + 1) & (Ppu::CgRamSize - 1);
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_ppu2OpenBus = value;
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return value;
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return value;
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}
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}
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@ -1198,10 +1213,11 @@ uint8_t Ppu::Read(uint16_t addr)
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uint8_t value;
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uint8_t value;
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if(_horizontalLocToggle) {
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if(_horizontalLocToggle) {
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//"Note that the value read is only 9 bits: bits 1-7 of the high byte are PPU2 Open Bus."
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//"Note that the value read is only 9 bits: bits 1-7 of the high byte are PPU2 Open Bus."
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value = ((_horizontalLocation & 0x100) >> 8) | ((addr >> 8) & 0xFE);
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value = ((_horizontalLocation & 0x100) >> 8) | (_ppu2OpenBus & 0xFE);
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} else {
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} else {
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value = _horizontalLocation & 0xFF;
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value = _horizontalLocation & 0xFF;
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}
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}
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_ppu2OpenBus = value;
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_horizontalLocToggle = !_horizontalLocToggle;
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_horizontalLocToggle = !_horizontalLocToggle;
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return value;
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return value;
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}
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}
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@ -1211,30 +1227,33 @@ uint8_t Ppu::Read(uint16_t addr)
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uint8_t value;
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uint8_t value;
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if(_verticalLocationToggle) {
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if(_verticalLocationToggle) {
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//"Note that the value read is only 9 bits: bits 1-7 of the high byte are PPU2 Open Bus."
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//"Note that the value read is only 9 bits: bits 1-7 of the high byte are PPU2 Open Bus."
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value = ((_verticalLocation & 0x100) >> 8) | ((addr >> 8) & 0xFE);
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value = ((_verticalLocation & 0x100) >> 8) | (_ppu2OpenBus & 0xFE);
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} else {
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} else {
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value = _verticalLocation & 0xFF;
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value = _verticalLocation & 0xFF;
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}
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}
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_ppu2OpenBus = value;
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_verticalLocationToggle = !_verticalLocationToggle;
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_verticalLocationToggle = !_verticalLocationToggle;
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return value;
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return value;
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}
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}
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case 0x213E:
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case 0x213E: {
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//STAT77 - PPU Status Flag and Version
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//STAT77 - PPU Status Flag and Version
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//TODO open bus on bit 4
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uint8_t value = (
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return (
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(_timeOver ? 0x80 : 0) |
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(_timeOver ? 0x80 : 0) |
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(_rangeOver ? 0x40 : 0) |
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(_rangeOver ? 0x40 : 0) |
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(_ppu1OpenBus & 0x10) |
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0x01 //PPU (5c77) chip version
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0x01 //PPU (5c77) chip version
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);
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);
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_ppu1OpenBus = value;
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return value;
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}
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case 0x213F: {
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case 0x213F: {
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//STAT78 - PPU Status Flag and Version
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//STAT78 - PPU Status Flag and Version
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//TODO open bus on bit 5
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uint8_t value = (
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uint8_t value = (
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((_frameCount & 0x01) ? 0x80 : 0) |
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((_frameCount & 0x01) ? 0x80 : 0) |
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(_locationLatched ? 0x40 : 0) |
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(_locationLatched ? 0x40 : 0) |
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(_ppu2OpenBus & 0x20) |
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//TODO (_isPal ? 0x10 : 0)
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//TODO (_isPal ? 0x10 : 0)
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0x02 //PPU (5c78) chip version
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0x02 //PPU (5c78) chip version
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);
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);
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@ -1246,7 +1265,7 @@ uint8_t Ppu::Read(uint16_t addr)
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_horizontalLocToggle = false;
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_horizontalLocToggle = false;
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_verticalLocationToggle = false;
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_verticalLocationToggle = false;
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}
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}
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_ppu2OpenBus = value;
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return value;
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return value;
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}
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}
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@ -1255,6 +1274,11 @@ uint8_t Ppu::Read(uint16_t addr)
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break;
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break;
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}
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}
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uint16_t reg = addr & 0x210F;
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if((reg >= 0x2104 && reg <= 0x2106) || (reg >= 0x2108 && reg <= 0x210A)) {
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//Registers matching $21x4-6 or $21x8-A (where x is 0-2) return the last value read from any of the PPU1 registers $2134-6, $2138-A, or $213E.
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return _ppu1OpenBus;
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}
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return _console->GetMemoryManager()->GetOpenBus();
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return _console->GetMemoryManager()->GetOpenBus();
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}
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}
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@ -1384,9 +1408,7 @@ void Ppu::Write(uint32_t addr, uint8_t value)
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case 3: _vramIncrementValue = 128; break;
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case 3: _vramIncrementValue = 128; break;
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}
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}
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//TODO : Remapping is not implemented yet
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_vramAddressRemapping = (value & 0x0C) >> 2;
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_vramAddressRemapping = (value & 0x0C) >> 2;
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_vramAddrIncrementOnSecondReg = (value & 0x80) != 0;
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_vramAddrIncrementOnSecondReg = (value & 0x80) != 0;
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break;
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break;
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@ -77,6 +77,9 @@ private:
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bool _vramAddrIncrementOnSecondReg;
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bool _vramAddrIncrementOnSecondReg;
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uint16_t _vramReadBuffer = 0;
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uint16_t _vramReadBuffer = 0;
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uint8_t _ppu1OpenBus = 0;
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uint8_t _ppu2OpenBus = 0;
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uint16_t _cgramAddress;
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uint16_t _cgramAddress;
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uint8_t _cgram[Ppu::CgRamSize];
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uint8_t _cgram[Ppu::CgRamSize];
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