empathicqubit/Mesen-SX
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

PPU: Implemented OAM writes

Browse source
This commit is contained in:
Sour 2019-02-17 21:09:33 -05:00
parent 2305900939
commit a19013da76
2 changed files with 36 additions and 16 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

37
Core/Ppu.cpp
View file

@ -63,6 +63,9 @@ void Ppu::Exec()
_scanline++; _scanline++;
if(_scanline == 225) { if(_scanline == 225) {
//Reset OAM address at the start of vblank?
_internalOamAddress = (_oamRamAddress << 1);
_frameCount++; _frameCount++;
_console->GetSpc()->ProcessEndFrame(); _console->GetSpc()->ProcessEndFrame();
_console->GetControlManager()->UpdateInputState(); _console->GetControlManager()->UpdateInputState();
@ -177,7 +180,7 @@ uint8_t* Ppu::GetCgRam()
uint8_t* Ppu::GetSpriteRam() uint8_t* Ppu::GetSpriteRam()
{ {
return _spriteRam; return _oamRam;
} }
uint8_t Ppu::Read(uint16_t addr) uint8_t Ppu::Read(uint16_t addr)
@ -195,27 +198,35 @@ void Ppu::Write(uint32_t addr, uint8_t value)
{ {
switch(addr) { switch(addr) {
case 0x2101: case 0x2101:
//TODO _oamMode = (value & 0xE0) >> 5;
//_spriteMode = (value & 0xE0) >> 5; _oamBaseAddress = (value & 0x07) << 13;
//_spriteBaseAddress = (value & 0x07) << 13; _oamAddressOffset = (value & 0x18) << 9;
//_spriteAddressOffset = (value & 0x18) << 9;
break; break;
case 0x2102: case 0x2102:
//TODO _oamRamAddress = (_oamRamAddress & 0x100) | value;
//_oamAddress = (value << 1); _internalOamAddress = (_oamRamAddress << 1);
break; break;
case 0x2103: case 0x2103:
//TODO _oamRamAddress = (_oamRamAddress & 0xFF) | ((value & 0x01) << 8);
//_oamTableSelect = value & 0x01; _internalOamAddress = (_oamRamAddress << 1);
//_enableOamPriority = (value & 0x80) != 0; _enableOamPriority = (value & 0x80) != 0;
break; break;
case 0x2104: case 0x2104:
//TODO if(_internalOamAddress < 512) {
//_oam[_oamAddress] = value; if(_internalOamAddress & 0x01) {
//_oamAddress++; _oamRam[_internalOamAddress - 1] = _oamWriteBuffer;
_oamRam[_internalOamAddress] = value;
} else {
_oamWriteBuffer = value;
}
} else if(_internalOamAddress >= 512) {
uint16_t address = 0x200 | (_internalOamAddress & 0x1F);
_oamRam[address] = value;
}
_internalOamAddress = (_internalOamAddress + 1) & 0x3FF;
break; break;
case 0x2105: case 0x2105:

15
Core/Ppu.h
View file

@ -32,12 +32,21 @@ private:
uint16_t _cgramAddress; uint16_t _cgramAddress;
uint8_t _cgram[Ppu::CgRamSize]; uint8_t _cgram[Ppu::CgRamSize];
uint8_t _spriteRam[Ppu::SpriteRamSize];
uint16_t *_outputBuffers[2]; uint16_t *_outputBuffers[2];
uint16_t *_currentBuffer; uint16_t *_currentBuffer;
void RenderTilemap(LayerConfig & config, uint8_t bpp); uint8_t _oamMode = 0;
uint8_t _oamBaseAddress = 0;
uint8_t _oamAddressOffset = 0;
uint8_t _oamRam[Ppu::SpriteRamSize];
uint16_t _oamRamAddress = 0;
bool _enableOamPriority = false;
uint16_t _internalOamAddress = 0;
uint8_t _oamWriteBuffer = 0;
void RenderTilemap(LayerConfig &config, uint8_t bpp);
public: public:
Ppu(shared_ptr<Console> console); Ppu(shared_ptr<Console> console);