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Disassembler: Fixed disassembly being incorrect when bytes are shared by 2 instructions (e.g 2nd byte of BRK/COP)

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This commit is contained in:
Sour 2019-08-04 15:13:20 -04:00
parent fbc0f2e0de
commit c9fe8c1303
1 changed files with 7 additions and 10 deletions
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17
Core/Disassembler.cpp
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@ -282,14 +282,12 @@ void Disassembler::Disassemble(CpuType cpuType)
uint8_t opSize = 0; uint8_t opSize = 0;
uint8_t opCode = (source + addrInfo.Address)[0]; uint8_t opCode = (source + addrInfo.Address)[0];
bool needRealign = true;
bool isCode = addrInfo.Type == SnesMemoryType::PrgRom ? _cdl->IsCode(addrInfo.Address) : false; bool isCode = addrInfo.Type == SnesMemoryType::PrgRom ? _cdl->IsCode(addrInfo.Address) : false;
bool isData = addrInfo.Type == SnesMemoryType::PrgRom ? _cdl->IsData(addrInfo.Address) : false; bool isData = addrInfo.Type == SnesMemoryType::PrgRom ? _cdl->IsData(addrInfo.Address) : false;
if(disassemblyInfo.IsInitialized()) { if(disassemblyInfo.IsInitialized()) {
opSize = disassemblyInfo.GetOpSize(); opSize = disassemblyInfo.GetOpSize();
needRealign = false;
} else if((isData && disData) || (!isData && !isCode && disUnident)) { } else if((isData && disData) || (!isData && !isCode && disUnident)) {
opSize = DisassemblyInfo::GetOpSize(opCode, 0, cpuType); opSize = DisassemblyInfo::GetOpSize(opCode, 0, cpuType);
} }
@ -331,15 +329,14 @@ void Disassembler::Disassemble(CpuType cpuType)
results.push_back(DisassemblyResult(addrInfo, i)); results.push_back(DisassemblyResult(addrInfo, i));
} }
if(needRealign) { //Move to the end of the instruction (but realign disassembly if another valid instruction is found)
for(int j = 1, max = (int)(*cache).size(); j < opSize && addrInfo.Address + j < max; j++) { //This can sometimes happen if the 2nd byte of BRK/COP is reused as the first byte of the next instruction
if((*cache)[addrInfo.Address + j].IsInitialized()) { //Also required when disassembling unvalidated data as code (to realign once we find verified code)
break; for(int j = 1, max = (int)(*cache).size(); j < opSize && addrInfo.Address + j < max; j++) {
} if((*cache)[addrInfo.Address + j].IsInitialized()) {
i++; break;
} }
} else { i++;
i += opSize - 1;
} }
if(DisassemblyInfo::IsReturnInstruction(opCode, cpuType)) { if(DisassemblyInfo::IsReturnInstruction(opCode, cpuType)) {