Fixed memory leaks
This commit is contained in:
parent
5b1f62ab8e
commit
e257db4def
7 changed files with 39 additions and 25 deletions
|
@ -13,6 +13,12 @@ private:
|
||||||
uint32_t _saveRamSize = 0;
|
uint32_t _saveRamSize = 0;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
|
~BaseCartridge()
|
||||||
|
{
|
||||||
|
delete[] _prgRom;
|
||||||
|
delete[] _saveRam;
|
||||||
|
}
|
||||||
|
|
||||||
static shared_ptr<BaseCartridge> CreateCartridge(VirtualFile romFile, VirtualFile patchFile)
|
static shared_ptr<BaseCartridge> CreateCartridge(VirtualFile romFile, VirtualFile patchFile)
|
||||||
{
|
{
|
||||||
if(romFile.IsValid()) {
|
if(romFile.IsValid()) {
|
||||||
|
|
|
@ -48,6 +48,7 @@ void Console::Stop()
|
||||||
|
|
||||||
_cpu.reset();
|
_cpu.reset();
|
||||||
_ppu.reset();
|
_ppu.reset();
|
||||||
|
_cart.reset();
|
||||||
_memoryManager.reset();
|
_memoryManager.reset();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -60,7 +61,7 @@ void Console::LoadRom(VirtualFile romFile, VirtualFile patchFile)
|
||||||
_ppu.reset(new Ppu(shared_from_this()));
|
_ppu.reset(new Ppu(shared_from_this()));
|
||||||
_cart = cart;
|
_cart = cart;
|
||||||
_memoryManager.reset(new MemoryManager());
|
_memoryManager.reset(new MemoryManager());
|
||||||
_memoryManager->Initialize(cart, shared_from_this());
|
_memoryManager->Initialize(shared_from_this());
|
||||||
|
|
||||||
_cpu.reset(new Cpu(_memoryManager));
|
_cpu.reset(new Cpu(_memoryManager));
|
||||||
|
|
||||||
|
|
|
@ -2,7 +2,7 @@
|
||||||
#include "DmaController.h"
|
#include "DmaController.h"
|
||||||
#include "MemoryManager.h"
|
#include "MemoryManager.h"
|
||||||
|
|
||||||
DmaController::DmaController(shared_ptr<MemoryManager> memoryManager)
|
DmaController::DmaController(MemoryManager *memoryManager)
|
||||||
{
|
{
|
||||||
_memoryManager = memoryManager;
|
_memoryManager = memoryManager;
|
||||||
}
|
}
|
||||||
|
|
|
@ -27,13 +27,13 @@ private:
|
||||||
};
|
};
|
||||||
|
|
||||||
DmaChannelConfig _channel[8] = {};
|
DmaChannelConfig _channel[8] = {};
|
||||||
shared_ptr<MemoryManager> _memoryManager;
|
MemoryManager *_memoryManager;
|
||||||
|
|
||||||
void RunSingleTransfer(DmaChannelConfig &channel, uint32_t &bytesLeft);
|
void RunSingleTransfer(DmaChannelConfig &channel, uint32_t &bytesLeft);
|
||||||
void RunDma(DmaChannelConfig &channel);
|
void RunDma(DmaChannelConfig &channel);
|
||||||
|
|
||||||
public:
|
public:
|
||||||
DmaController(shared_ptr<MemoryManager> memoryManager);
|
DmaController(MemoryManager *memoryManager);
|
||||||
|
|
||||||
void Write(uint16_t addr, uint8_t value);
|
void Write(uint16_t addr, uint8_t value);
|
||||||
};
|
};
|
|
@ -10,16 +10,14 @@
|
||||||
class CpuRegisterHandler : public IMemoryHandler
|
class CpuRegisterHandler : public IMemoryHandler
|
||||||
{
|
{
|
||||||
private:
|
private:
|
||||||
shared_ptr<Ppu> _ppu;
|
Ppu *_ppu;
|
||||||
shared_ptr<MemoryManager> _memoryManager;
|
DmaController *_dmaController;
|
||||||
unique_ptr<DmaController> _dmaController;
|
|
||||||
|
|
||||||
public:
|
public:
|
||||||
CpuRegisterHandler(shared_ptr<Console> console)
|
CpuRegisterHandler(Ppu *ppu, DmaController *dmaController)
|
||||||
{
|
{
|
||||||
_ppu = console->GetPpu();
|
_ppu = ppu;
|
||||||
_memoryManager = console->GetMemoryManager();
|
_dmaController = dmaController;
|
||||||
_dmaController.reset(new DmaController(_memoryManager));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t Read(uint32_t addr) override
|
uint8_t Read(uint32_t addr) override
|
||||||
|
@ -70,8 +68,7 @@ private:
|
||||||
shared_ptr<BaseCartridge> _cart;
|
shared_ptr<BaseCartridge> _cart;
|
||||||
shared_ptr<CpuRegisterHandler> _cpuRegisterHandler;
|
shared_ptr<CpuRegisterHandler> _cpuRegisterHandler;
|
||||||
shared_ptr<Ppu> _ppu;
|
shared_ptr<Ppu> _ppu;
|
||||||
|
shared_ptr<DmaController> _dmaController;
|
||||||
unique_ptr<DmaController> _dmaController;
|
|
||||||
|
|
||||||
uint32_t _wramPosition;
|
uint32_t _wramPosition;
|
||||||
|
|
||||||
|
@ -79,15 +76,16 @@ private:
|
||||||
uint64_t _lastMasterClock;
|
uint64_t _lastMasterClock;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
void Initialize(shared_ptr<BaseCartridge> cart, shared_ptr<Console> console)
|
void Initialize(shared_ptr<Console> console)
|
||||||
{
|
{
|
||||||
_lastMasterClock = 0;
|
_lastMasterClock = 0;
|
||||||
_masterClock = 0;
|
_masterClock = 0;
|
||||||
_console = console;
|
_console = console;
|
||||||
_cart = cart;
|
_cart = console->GetCartridge();
|
||||||
_ppu = console->GetPpu();
|
_ppu = console->GetPpu();
|
||||||
|
|
||||||
_cpuRegisterHandler.reset(new CpuRegisterHandler(console));
|
_dmaController.reset(new DmaController(console->GetMemoryManager().get()));
|
||||||
|
_cpuRegisterHandler.reset(new CpuRegisterHandler(_ppu.get(), _dmaController.get()));
|
||||||
|
|
||||||
memset(_handlers, 0, sizeof(_handlers));
|
memset(_handlers, 0, sizeof(_handlers));
|
||||||
_workRam = new uint8_t[MemoryManager::WorkRamSize];
|
_workRam = new uint8_t[MemoryManager::WorkRamSize];
|
||||||
|
@ -117,6 +115,7 @@ public:
|
||||||
|
|
||||||
~MemoryManager()
|
~MemoryManager()
|
||||||
{
|
{
|
||||||
|
delete[] _workRam;
|
||||||
}
|
}
|
||||||
|
|
||||||
void RegisterHandler(uint32_t startAddr, uint32_t endAddr, IMemoryHandler* handler)
|
void RegisterHandler(uint32_t startAddr, uint32_t endAddr, IMemoryHandler* handler)
|
||||||
|
|
25
Core/Ppu.cpp
25
Core/Ppu.cpp
|
@ -10,27 +10,34 @@ Ppu::Ppu(shared_ptr<Console> console)
|
||||||
{
|
{
|
||||||
_console = console;
|
_console = console;
|
||||||
|
|
||||||
_vram = new uint8_t[Ppu::VideoRamSize];
|
_outputBuffers[0] = new uint16_t[256 * 224];
|
||||||
memset(_vram, 0, Ppu::VideoRamSize);
|
_outputBuffers[1] = new uint16_t[256 * 224];
|
||||||
|
|
||||||
|
_currentBuffer = _outputBuffers[0];
|
||||||
|
|
||||||
_layerConfig[0] = {};
|
_layerConfig[0] = {};
|
||||||
_layerConfig[1] = {};
|
_layerConfig[1] = {};
|
||||||
_layerConfig[2] = {};
|
_layerConfig[2] = {};
|
||||||
_layerConfig[3] = {};
|
_layerConfig[3] = {};
|
||||||
|
|
||||||
_outputBuffers[0] = new uint16_t[256 * 224];
|
|
||||||
_outputBuffers[1] = new uint16_t[256 * 224];
|
|
||||||
|
|
||||||
_currentBuffer = _outputBuffers[0];
|
|
||||||
|
|
||||||
_cgramAddress = 0;
|
_cgramAddress = 0;
|
||||||
|
|
||||||
|
_vram = new uint8_t[Ppu::VideoRamSize];
|
||||||
|
memset(_vram, 0, Ppu::VideoRamSize);
|
||||||
|
|
||||||
_vramAddress = 0;
|
_vramAddress = 0;
|
||||||
_vramIncrementValue = 1;
|
_vramIncrementValue = 1;
|
||||||
_vramAddressRemapping = 0;
|
_vramAddressRemapping = 0;
|
||||||
_vramAddrIncrementOnSecondReg = false;
|
_vramAddrIncrementOnSecondReg = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
Ppu::~Ppu()
|
||||||
|
{
|
||||||
|
delete[] _vram;
|
||||||
|
delete[] _outputBuffers[0];
|
||||||
|
delete[] _outputBuffers[1];
|
||||||
|
}
|
||||||
|
|
||||||
PpuState Ppu::GetState()
|
PpuState Ppu::GetState()
|
||||||
{
|
{
|
||||||
return {
|
return {
|
||||||
|
@ -164,12 +171,12 @@ void Ppu::Write(uint32_t addr, uint8_t value)
|
||||||
|
|
||||||
case 0x2116:
|
case 0x2116:
|
||||||
//VMADDL - VRAM Address low byte
|
//VMADDL - VRAM Address low byte
|
||||||
_vramAddress = (_vramAddress & 0xFF00) | value;
|
_vramAddress = (_vramAddress & 0x7F00) | value;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x2117:
|
case 0x2117:
|
||||||
//VMADDH - VRAM Address high byte
|
//VMADDH - VRAM Address high byte
|
||||||
_vramAddress = (_vramAddress & 0x00FF) | (value << 8);
|
_vramAddress = (_vramAddress & 0x00FF) | ((value & 0x7F) << 8);
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 0x2118:
|
case 0x2118:
|
||||||
|
|
|
@ -39,6 +39,7 @@ private:
|
||||||
|
|
||||||
public:
|
public:
|
||||||
Ppu(shared_ptr<Console> console);
|
Ppu(shared_ptr<Console> console);
|
||||||
|
~Ppu();
|
||||||
|
|
||||||
PpuState GetState();
|
PpuState GetState();
|
||||||
|
|
||||||
|
|
Loading…
Add table
Reference in a new issue