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CPU: Fixed MVN/MVP instructions using the wrong src/dest banks

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This commit is contained in:
Sour 2019-02-20 20:00:59 -05:00
parent 011caf951c
commit f75db1b297
2 changed files with 5 additions and 5 deletions
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8
Core/Cpu.Instructions.cpp
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@ -614,8 +614,8 @@ Move operations
****************/
void Cpu::MVN()
{
uint32_t srcBank = (_operand << 16) & 0xFF0000;
uint32_t destBank = (_operand << 8) & 0xFF0000;
uint32_t destBank = (_operand << 16) & 0xFF0000;
uint32_t srcBank = (_operand << 8) & 0xFF0000;
while(_state.A != 0xFFFF) {
uint8_t value = ReadData(srcBank | _state.X);
Write(destBank | _state.Y, value);
@ -628,8 +628,8 @@ void Cpu::MVN()
void Cpu::MVP()
{
uint32_t srcBank = (_operand << 16) & 0xFF0000;
uint32_t destBank = (_operand << 8) & 0xFF0000;
uint32_t destBank = (_operand << 16) & 0xFF0000;
uint32_t srcBank = (_operand << 8) & 0xFF0000;
while(_state.A != 0xFFFF) {
uint8_t value = ReadData(srcBank | _state.X);
Write(destBank | _state.Y, value);

2
Core/DisassemblyInfo.cpp
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@ -54,7 +54,7 @@ void DisassemblyInfo::GetDisassembly(string &out, uint32_t memoryAddr)
case AddrMode::AbsLng: str.Write(operand); break;
case AddrMode::AbsLngJmp: str.Write(operand); break;
case AddrMode::Acc: break;
case AddrMode::BlkMov: str.Write(operand[0], operand[1], " <- ", operand[2], operand[3]); break; //TODO
case AddrMode::BlkMov: str.Write(operand[1], operand[2], " -> ", operand[3], operand[4]); break;
case AddrMode::DirIdxIndX: str.Write('(', operand, ",X)"); break;
case AddrMode::DirIdxX: str.Write(operand, ",X"); break;
case AddrMode::DirIdxY: str.Write(operand, ",Y"); break;