NovaSquirrel
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c0e249e993
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Revert "Merge branch 'reformat_code'"
This reverts commit daf3b57e89, reversing
changes made to 7a6e0b7d77.
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2021-03-10 11:13:28 -05:00 |
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Vladimir Kononovich
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3764af908f
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Reformat Core (Resharper)
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2020-12-19 23:30:09 +03:00 |
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Sour
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01dd319c9a
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HDMA: Added missing condition for indirect HDMA glitch
Fixes Touge Densetsu color corruption in bike configuration screen
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2020-06-10 18:08:08 -04:00 |
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Sour
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a1853f15bc
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Debugger: Event Viewer - Add list view (+ misc event viewer bug fixes)
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2019-12-10 19:13:30 -05:00 |
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Sour
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af175616cd
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Debugger: Added Register Viewer tool
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2019-10-10 23:54:38 -04:00 |
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Sour
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3e8abac530
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DMA: Fixed HDMA not properly interrupting DMA (fixes Dekitate High School)
Also fixed timing inaccuracies and refactored a bit.
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2019-07-06 18:07:09 -04:00 |
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Sour
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2927939a56
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DMA: Implemented cpu cycle that skips the IRQ/NMI check after DMA
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2019-07-05 19:18:30 -04:00 |
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Sour
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66c3d0a3b1
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CPU: Fixed pre/post-DMA timings when writing to $420B
i.e: read next opcode pre-DMA, finish that instruction post-DMA
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2019-06-30 19:47:12 -04:00 |
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Sour
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886234aae5
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Debugger: Event Viewer - Added DMA channel filters and more DMA-related information to the tooltips
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2019-05-04 20:13:31 -04:00 |
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Sour
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7bc96a867d
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Performance improvements and refactoring for timing changes
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2019-04-20 14:17:34 -04:00 |
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Sour
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984b1be481
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Timing improvements (DMA, HDMA, DRAM refresh, CPU cycles)
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2019-04-20 14:17:32 -04:00 |
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Sour
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8dee056dda
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DMA: Improved DMA/HDMA timing
Wait 1 cpu cycle before starting then sync to the next multiple of 8 and sync back to a multiple of a CPU cycle before stopping
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2019-04-11 22:34:28 -04:00 |
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Sour
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260e0f089d
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DMA: Implement NMI/IRQ handler delay after DMA/HDMA
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2019-04-04 17:49:47 -04:00 |
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Sour
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e1c7e7b9c4
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Linux: Fixed build/makefile and compilation errors/warnings (and add missing files to git)
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2019-03-31 14:50:12 -04:00 |
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Sour
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63f6de6a8e
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Core: Reset/Power Cycle support (+ fixed power on state for DMA controller)
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2019-03-16 12:20:18 -04:00 |
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Sour
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73913e1f0c
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Save state support
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2019-03-12 09:15:57 -04:00 |
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Sour
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a018f1129a
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DMA: Restrict $2080<->WRAM DMA behavior based on tests
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2019-03-09 14:27:32 -05:00 |
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Sour
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2cecde26fb
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DMA: HDMA init/run must interrupt/cancel regular DMA
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2019-03-09 12:01:36 -05:00 |
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Sour
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5952fcd3f5
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DMA: Implemented DMA register reads
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2019-02-21 07:55:53 -05:00 |
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Sour
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221bc44700
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DMA: Added support for HDMA (incorrect timings)
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2019-02-19 21:09:12 -05:00 |
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Sour
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da2d93aaed
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DMA: Fixed infinite loop in transfer mode 7
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2019-02-16 08:07:38 -05:00 |
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Sour
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e257db4def
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Fixed memory leaks
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2019-02-16 01:16:57 -05:00 |
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Sour
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85c84146bf
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DMA: Implemented all dma transfer modes
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2019-02-16 00:47:02 -05:00 |
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Sour
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0f657ccf63
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DMA: Refactoring + improvements/fixes
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2019-02-15 00:08:50 -05:00 |
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