Commit graph

15 commits

Author SHA1 Message Date
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02425d7453 DMA: Added delay values for DMA/HDMA 2019-02-21 23:35:51 -05:00
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0b7ad7c0db CPU: Added all idle cycles + added DRAM refresh delay 2019-02-21 22:10:41 -05:00
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97c7d06156 Fixed throw syntax 2019-02-21 18:18:25 -05:00
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e6809305f1 CPU: Enabling 8-bit indexes must truncate the value of X/Y (refix) 2019-02-20 22:46:14 -05:00
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fb8a9f18ed CPU: Fixed ClearIrqSource setting the irq instead of clearing it
A lot more games booting and getting in-game now
2019-02-20 20:50:43 -05:00
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aaf147b53b Refactor internal CPU registers + implement division register 2019-02-17 15:37:31 -05:00
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0757ccefa6 PPU: Horizontal/vertical IRQ timer support 2019-02-17 01:09:47 -05:00
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829f4e23c9 CPU: Fixed NMI logic/vector & JML instruction ($5C) 2019-02-15 00:09:46 -05:00
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b33380a95e CPU: Fixed bugs with PEA/PEI/PER 2019-02-14 19:00:17 -05:00
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0f64559882 CPU: Fixed issues with OR/EOR/AND and stack addressing mode 2019-02-14 00:48:16 -05:00
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ca95636c37 CPU addressing review/fixes, trace logger improvements 2019-02-13 18:44:12 -05:00
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522372a365 Fixed addressing bugs, added PPU stub, improved trace logger output, split CPU instructions to another file 2019-02-13 13:32:51 -05:00
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5c19584019 Imported some code from Mesen (video, audio, UI, etc.) + basic trace logger/step functionality 2019-02-12 22:13:09 -05:00
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5e7eebe078 CPU: Fixed immediate more 8-bit vs 16-bit logic
+ Added bare minimum logic to load a rom and start executing it
2019-02-11 22:41:34 -05:00
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8ad76f6c31 65816 core working in 6502 emulation mode 2019-02-11 19:18:47 -05:00