empathicqubit/Mesen-SX
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640 commits 3 branches 4 tags 18 MiB
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7 commits

Author SHA1 Message Date
Sour
234c494c3e Debugger: SA1 - Fixed display for BWRAM 2019-12-08 13:05:59 -05:00
Sour
4a7e6df39b SA-1: Implemented bitmap mode for BWRAM 
Fixes SMRPG's level up screen
 2019-12-08 11:28:38 -05:00
Sour
67b286a16f SA1: Improved timings (bus conflicts, etc.) 
-Fixed I-RAM access speed while main CPU is DMAing to I-RAM
-Fixed missing extra cycle on BRL
-Fixed idle SA-1 cycles (incorrectly) taking more than 1 cycle during bus conflicts
-Fixed branch instructions to apply cycle penalties based on the destination address' type (rather than the source address)
 2019-11-25 21:01:21 -05:00
Sour
efe157cfcb SA-1: Added variable bit length data support 2019-08-09 00:04:01 -04:00
Sour
22d4f58eae SA-1: Add support for both character conversion types 2019-08-08 23:05:24 -04:00
Sour
33cee67e61 Added GSU (Super FX) support 2019-07-30 22:43:32 -04:00
Sour
fe470dd87a SA-1 support (still missing a few rarely used features) 2019-07-25 22:22:09 -04:00