201 lines
6 KiB
C
201 lines
6 KiB
C
// CPU Byte Order Utilities
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// snes_spc 0.9.0
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#ifndef BLARGG_ENDIAN
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#define BLARGG_ENDIAN
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#include "blargg_common.h"
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// BLARGG_CPU_CISC: Defined if CPU has very few general-purpose registers (< 16)
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#if defined (_M_IX86) || defined (_M_IA64) || defined (__i486__) || \
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defined (__x86_64__) || defined (__ia64__) || defined (__i386__)
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#define BLARGG_CPU_X86 1
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#define BLARGG_CPU_CISC 1
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#endif
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#if defined (__powerpc__) || defined (__ppc__) || defined (__POWERPC__) || defined (__powerc)
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#define BLARGG_CPU_POWERPC 1
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#define BLARGG_CPU_RISC 1
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#endif
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// BLARGG_BIG_ENDIAN, BLARGG_LITTLE_ENDIAN: Determined automatically, otherwise only
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// one may be #defined to 1. Only needed if something actually depends on byte order.
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#if !defined (BLARGG_BIG_ENDIAN) && !defined (BLARGG_LITTLE_ENDIAN)
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#ifdef __GLIBC__
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// GCC handles this for us
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#include <endian.h>
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#if __BYTE_ORDER == __LITTLE_ENDIAN
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#define BLARGG_LITTLE_ENDIAN 1
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#elif __BYTE_ORDER == __BIG_ENDIAN
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#define BLARGG_BIG_ENDIAN 1
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#endif
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#else
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#if defined (LSB_FIRST) || defined (__LITTLE_ENDIAN__) || BLARGG_CPU_X86 || \
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(defined (LITTLE_ENDIAN) && LITTLE_ENDIAN+0 != 1234)
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#define BLARGG_LITTLE_ENDIAN 1
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#endif
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#if defined (MSB_FIRST) || defined (__BIG_ENDIAN__) || defined (WORDS_BIGENDIAN) || \
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defined (__sparc__) || BLARGG_CPU_POWERPC || \
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(defined (BIG_ENDIAN) && BIG_ENDIAN+0 != 4321)
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#define BLARGG_BIG_ENDIAN 1
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#elif !defined (__mips__)
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// No endian specified; assume little-endian, since it's most common
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#define BLARGG_LITTLE_ENDIAN 1
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#endif
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#endif
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#endif
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#if BLARGG_LITTLE_ENDIAN && BLARGG_BIG_ENDIAN
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#undef BLARGG_LITTLE_ENDIAN
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#undef BLARGG_BIG_ENDIAN
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#endif
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inline void blargg_verify_byte_order()
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{
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#ifndef NDEBUG
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#if BLARGG_BIG_ENDIAN
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volatile int i = 1;
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assert( *(volatile char*) &i == 0 );
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#elif BLARGG_LITTLE_ENDIAN
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volatile int i = 1;
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assert(*(volatile char*) &i != 0);
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#endif
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#endif
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}
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inline unsigned get_le16(void const* p)
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{
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return (unsigned)((unsigned char const*)p)[1] << 8 |
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(unsigned)((unsigned char const*)p)[0];
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}
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inline unsigned get_be16(void const* p)
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{
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return (unsigned)((unsigned char const*)p)[0] << 8 |
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(unsigned)((unsigned char const*)p)[1];
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}
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inline blargg_ulong get_le32(void const* p)
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{
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return (blargg_ulong)((unsigned char const*)p)[3] << 24 |
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(blargg_ulong)((unsigned char const*)p)[2] << 16 |
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(blargg_ulong)((unsigned char const*)p)[1] << 8 |
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(blargg_ulong)((unsigned char const*)p)[0];
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}
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inline blargg_ulong get_be32(void const* p)
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{
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return (blargg_ulong)((unsigned char const*)p)[0] << 24 |
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(blargg_ulong)((unsigned char const*)p)[1] << 16 |
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(blargg_ulong)((unsigned char const*)p)[2] << 8 |
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(blargg_ulong)((unsigned char const*)p)[3];
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}
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inline void set_le16(void* p, unsigned n)
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{
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((unsigned char*)p)[1] = (unsigned char)(n >> 8);
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((unsigned char*)p)[0] = (unsigned char)n;
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}
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inline void set_be16(void* p, unsigned n)
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{
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((unsigned char*)p)[0] = (unsigned char)(n >> 8);
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((unsigned char*)p)[1] = (unsigned char)n;
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}
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inline void set_le32(void* p, blargg_ulong n)
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{
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((unsigned char*)p)[0] = (unsigned char)n;
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((unsigned char*)p)[1] = (unsigned char)(n >> 8);
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((unsigned char*)p)[2] = (unsigned char)(n >> 16);
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((unsigned char*)p)[3] = (unsigned char)(n >> 24);
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}
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inline void set_be32(void* p, blargg_ulong n)
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{
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((unsigned char*)p)[3] = (unsigned char)n;
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((unsigned char*)p)[2] = (unsigned char)(n >> 8);
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((unsigned char*)p)[1] = (unsigned char)(n >> 16);
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((unsigned char*)p)[0] = (unsigned char)(n >> 24);
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}
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#if BLARGG_NONPORTABLE
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// Optimized implementation if byte order is known
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#if BLARGG_LITTLE_ENDIAN
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#define GET_LE16( addr ) (*(BOOST::uint16_t*) (addr))
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#define GET_LE32( addr ) (*(BOOST::uint32_t*) (addr))
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#define SET_LE16( addr, data ) (void) (*(BOOST::uint16_t*) (addr) = (data))
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#define SET_LE32( addr, data ) (void) (*(BOOST::uint32_t*) (addr) = (data))
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#elif BLARGG_BIG_ENDIAN
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#define GET_BE16( addr ) (*(BOOST::uint16_t*) (addr))
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#define GET_BE32( addr ) (*(BOOST::uint32_t*) (addr))
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#define SET_BE16( addr, data ) (void) (*(BOOST::uint16_t*) (addr) = (data))
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#define SET_BE32( addr, data ) (void) (*(BOOST::uint32_t*) (addr) = (data))
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#if BLARGG_CPU_POWERPC
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// PowerPC has special byte-reversed instructions
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#if defined (__MWERKS__)
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#define GET_LE16( addr ) (__lhbrx( addr, 0 ))
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#define GET_LE32( addr ) (__lwbrx( addr, 0 ))
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#define SET_LE16( addr, in ) (__sthbrx( in, addr, 0 ))
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#define SET_LE32( addr, in ) (__stwbrx( in, addr, 0 ))
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#elif defined (__GNUC__)
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#define GET_LE16( addr ) ({unsigned ppc_lhbrx_; asm( "lhbrx %0,0,%1" : "=r" (ppc_lhbrx_) : "r" (addr), "0" (ppc_lhbrx_) ); ppc_lhbrx_;})
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#define GET_LE32( addr ) ({unsigned ppc_lwbrx_; asm( "lwbrx %0,0,%1" : "=r" (ppc_lwbrx_) : "r" (addr), "0" (ppc_lwbrx_) ); ppc_lwbrx_;})
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#define SET_LE16( addr, in ) ({asm( "sthbrx %0,0,%1" : : "r" (in), "r" (addr) );})
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#define SET_LE32( addr, in ) ({asm( "stwbrx %0,0,%1" : : "r" (in), "r" (addr) );})
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#endif
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#endif
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#endif
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#endif
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#ifndef GET_LE16
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#define GET_LE16( addr ) get_le16( addr )
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#define SET_LE16( addr, data ) set_le16( addr, data )
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#endif
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#ifndef GET_LE32
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#define GET_LE32( addr ) get_le32( addr )
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#define SET_LE32( addr, data ) set_le32( addr, data )
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#endif
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#ifndef GET_BE16
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#define GET_BE16( addr ) get_be16( addr )
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#define SET_BE16( addr, data ) set_be16( addr, data )
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#endif
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#ifndef GET_BE32
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#define GET_BE32( addr ) get_be32( addr )
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#define SET_BE32( addr, data ) set_be32( addr, data )
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#endif
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// auto-selecting versions
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inline void set_le(BOOST::uint16_t* p, unsigned n)
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{
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SET_LE16(p, n);
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}
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inline void set_le(BOOST::uint32_t* p, blargg_ulong n)
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{
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SET_LE32(p, n);
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}
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inline void set_be(BOOST::uint16_t* p, unsigned n)
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{
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SET_BE16(p, n);
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}
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inline void set_be(BOOST::uint32_t* p, blargg_ulong n)
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{
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SET_BE32(p, n);
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}
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inline unsigned get_le(BOOST::uint16_t* p) { return GET_LE16(p); }
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inline blargg_ulong get_le(BOOST::uint32_t* p) { return GET_LE32(p); }
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inline unsigned get_be(BOOST::uint16_t* p) { return GET_BE16(p); }
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inline blargg_ulong get_be(BOOST::uint32_t* p) { return GET_BE32(p); }
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#endif
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