PPU VRAM, partially fixes tests
This commit is contained in:
Souryo
parent
cc674a7467
commit
3ad6418726
9 changed files with 160 additions and 71 deletions
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@ -27,6 +27,7 @@ class BaseMapper : public IMemoryHandler
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class DefaultMapper : public BaseMapper
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{
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vector<MemoryBank*> _mappedRomBanks;
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MemoryBank *_mappedVromBank;
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private:
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void InitMapper()
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{
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@ -35,23 +36,40 @@ class DefaultMapper : public BaseMapper
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} else {
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_mappedRomBanks = { &_romBanks[0], &_romBanks[1] };
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}
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_mappedVromBank = &_vromBanks[0];
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}
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public:
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std::array<int, 2> GetIOAddresses()
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vector<std::array<uint16_t, 2>> GetRAMAddresses()
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{
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return std::array<int, 2> {{ 0x8000, 0xFFFF }};
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return { { { 0x8000, 0xFFFF } } };
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}
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vector<std::array<uint16_t, 2>> GetVRAMAddresses()
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{
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return { { { 0x0000, 0x1FFF } } };
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}
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uint8_t MemoryRead(uint16_t addr)
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uint8_t ReadRAM(uint16_t addr)
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{
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return (*_mappedRomBanks[(addr >> 14) & 0x01])[addr & 0x3FFF];
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}
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void MemoryWrite(uint16_t addr, uint8_t value)
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void WriteRAM(uint16_t addr, uint8_t value)
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{
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(*_mappedRomBanks[(addr >> 14) & 0x01])[addr & 0x3FFF] = value;
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}
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uint8_t ReadVRAM(uint16_t addr)
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{
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return (*_mappedVromBank)[addr & 0x1FFF];
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}
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void WriteVRAM(uint16_t addr, uint8_t value)
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{
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(*_mappedVromBank)[addr & 0x1FFF] = value;
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}
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};
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class MapperFactory
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17
Core/CPU.h
17
Core/CPU.h
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@ -144,7 +144,7 @@ private:
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uint8_t SP() { return _state.SP; }
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void SetSP(uint8_t value) { _state.SP = value; }
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uint8_t PS() { return _state.PS; }
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void SetPS(uint8_t value) { _state.PS = value | PSFlags::Reserved; }
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void SetPS(uint8_t value) { _state.PS = (value & 0xDF) | PSFlags::Reserved; }
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uint16_t PC() { return _state.PC; }
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void SetPC(uint16_t value) { _state.PC = value; }
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@ -182,8 +182,7 @@ private:
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uint16_t GetInd() {
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uint16_t addr = ReadWord();
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if(addr & 0xFF == 0xFF) {
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//Emulate a CPU bug when crossing page boundary
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if((addr & 0xFF) == 0xFF) {
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auto lo = MemoryRead(addr);
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auto hi = MemoryRead(addr - 0xFF);
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return (lo | hi << 8);
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@ -250,7 +249,7 @@ private:
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if(reg == value) {
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SetFlags(PSFlags::Zero);
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}
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if(result & 0x80 == 0x80) {
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if((result & 0x80) == 0x80) {
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SetFlags(PSFlags::Negative);
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}
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}
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@ -437,8 +436,8 @@ private:
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void PHA() { Push(A()); }
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void PHP() {
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SetFlags(PSFlags::Break);
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Push((uint8_t)PS());
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uint8_t flags = PS() | PSFlags::Break;
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Push((uint8_t)flags);
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}
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void PLA() { SetA(Pop()); }
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void PLP() { SetPS(Pop()); }
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@ -607,11 +606,11 @@ private:
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void SEI() { SetFlags(PSFlags::Interrupt); }
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void BRK() {
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SetFlags(PSFlags::Break);
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Push((uint16_t)(PC() + 1));
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Push((uint8_t)PS());
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uint8_t flags = PS() | PSFlags::Break;
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Push((uint8_t)flags);
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SetFlags(PSFlags::Interrupt);
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ClearFlags(PSFlags::Break);
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SetPC(MemoryReadWord(0xFFFE));
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}
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@ -6,13 +6,13 @@ Console::Console(string filename)
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{
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_mapper = MapperFactory::InitializeFromFile(filename);
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_memoryManager.RegisterIODevice(_mapper.get());
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_memoryManager.RegisterIODevice(&_ppu);
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_cpu.reset(new CPU(&_memoryManager));
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_ppu.reset(new PPU(&_memoryManager));
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_memoryManager.RegisterIODevice(_ppu.get());
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}
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Console::~Console()
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{
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_cpu.release();
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}
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void Console::Reset()
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@ -24,65 +24,72 @@ void Console::Run()
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{
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while(true) {
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_cpu->Exec();
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_ppu.Exec();
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_ppu->Exec();
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}
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}
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void Console::RunTest(bool callback(Console*))
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{
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while(true) {
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_cpu->Exec();
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_ppu.Exec();
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if(callback(this)) {
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break;
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}
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_cpu->Exec();
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_ppu->Exec();
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}
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}
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void Console::RunTests()
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{
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/*Console *console = new Console("mario.nes");
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console->Run();
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delete console;*/
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vector<std::string> testROMs = { {
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vector<string> testROMs {
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//"mario"
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"01-basics",
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"02-implied",
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//"03-immediate",
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//"04-zero_page",
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//"05-zp_xy",
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//"06-absolute",
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//"07-abs_xy",
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"03-immediate",
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"04-zero_page",
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"05-zp_xy",
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"06-absolute",
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"07-abs_xy",
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"08-ind_x",
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"09-ind_y",
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"10-branches",
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"11-stack",
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"12-jmp_jsr",
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"13-rts",
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"14-rti",
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//"15-brk",
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"14-rti",
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"15-brk",
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"16-special"
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} };
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};
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for(string testROM : testROMs) {
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Console *console = new Console(string("TestSuite/") + testROM + ".nes");
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if(testROM == "nestest") {
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console->RunTest([] (Console *console) {
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auto state = console->_cpu->GetState();
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std::stringstream ss;
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ss << std::hex << (short)state.PC << " A:" << (short)state.A << " X:" << (short)state.X << " Y:" << (short)state.Y << std::endl;
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OutputDebugStringA(ss.str().c_str());
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State state = console->_cpu->GetState();
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std::cout << std::hex << std::uppercase <<
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"A:" << std::setfill('0') << std::setw(2) << (short)state.A <<
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" X:" << std::setfill('0') << std::setw(2) << (short)state.X <<
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" Y:" << std::setfill('0') << std::setw(2) << (short)state.Y <<
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" S:" << std::setfill('0') << std::setw(2) << (short)state.SP <<
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" P:........ $" <<
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std::setfill('0') << std::setw(4) << (short)state.PC <<std::endl;
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return false;
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});
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} else {
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console->RunTest([] (Console *console) {
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//static std::ofstream output("test.log", ios::out | ios::binary);
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static std::ofstream output("test.log", ios::out | ios::binary);
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static bool testStarted = false;
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uint8_t testStatus = console->_memoryManager.Read(0x6000);
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State state = console->_cpu->GetState();
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//output << std::hex << (short)state.PC << " A:" << (short)state.A << " X:" << (short)state.X << " Y:" << (short)state.Y << std::endl;
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/*output << std::hex << std::uppercase <<
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"A:" << std::setfill('0') << std::setw(2) << (short)state.A <<
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" X:" << std::setfill('0') << std::setw(2) << (short)state.X <<
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" Y:" << std::setfill('0') << std::setw(2) << (short)state.Y <<
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" S:" << std::setfill('0') << std::setw(2) << (short)state.SP <<
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" P:........ $" <<
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std::setfill('0') << std::setw(4) << (short)state.PC <<std::endl;*/
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if(testStatus == 0x81) {
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//need reset
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@ -8,7 +8,7 @@ class Console
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{
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private:
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unique_ptr<CPU> _cpu;
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PPU _ppu;
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unique_ptr<PPU> _ppu;
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shared_ptr<BaseMapper> _mapper;
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MemoryManager _memoryManager;
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@ -4,8 +4,11 @@
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class IMemoryHandler
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{
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public:
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virtual std::array<int, 2> GetIOAddresses() = 0;
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virtual uint8_t MemoryRead(uint16_t addr) = 0;
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virtual void MemoryWrite(uint16_t addr, uint8_t value) = 0;
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public:
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virtual vector<std::array<uint16_t, 2>> GetRAMAddresses() = 0;
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virtual vector<std::array<uint16_t, 2>> GetVRAMAddresses() { return{}; }
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virtual uint8_t ReadRAM(uint16_t addr) = 0;
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virtual void WriteRAM(uint16_t addr, uint8_t value) = 0;
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virtual uint8_t ReadVRAM(uint16_t addr) { return 0; }
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virtual void WriteVRAM(uint16_t addr, uint8_t value) { }
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};
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@ -3,8 +3,8 @@
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uint8_t MemoryManager::ReadRegister(uint16_t addr)
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{
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if(_registerHandlers[addr]) {
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return _registerHandlers[addr]->MemoryRead(addr);
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if(_ramHandlers[addr]) {
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return _ramHandlers[addr]->ReadRAM(addr);
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} else {
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return 0;
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}
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@ -12,8 +12,24 @@ uint8_t MemoryManager::ReadRegister(uint16_t addr)
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void MemoryManager::WriteRegister(uint16_t addr, uint8_t value)
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{
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if(_registerHandlers[addr]) {
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_registerHandlers[addr]->MemoryWrite(addr, value);
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if(_ramHandlers[addr]) {
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_ramHandlers[addr]->WriteRAM(addr, value);
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}
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}
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uint8_t MemoryManager::ReadMappedVRAM(uint16_t addr)
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{
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if(_vramHandlers[addr]) {
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return _vramHandlers[addr]->ReadVRAM(addr);
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} else {
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return 0;
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}
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}
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void MemoryManager::WriteMappedVRAM(uint16_t addr, uint8_t value)
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{
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if(_vramHandlers[addr]) {
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_vramHandlers[addr]->WriteVRAM(addr, value);
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}
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}
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@ -21,13 +37,19 @@ MemoryManager::MemoryManager()
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{
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_internalRAM = new uint8_t[InternalRAMSize];
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_SRAM = new uint8_t[SRAMSize];
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_videoRAM = new uint8_t[VRAMSize];
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_expansionRAM = new uint8_t[0x2000];
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ZeroMemory(_internalRAM, InternalRAMSize);
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ZeroMemory(_SRAM, SRAMSize);
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ZeroMemory(_videoRAM, VRAMSize);
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ZeroMemory(_expansionRAM, 0x2000);
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for(int i = 0; i <= 0xFFFF; i++) {
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_registerHandlers.push_back(nullptr);
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_ramHandlers.push_back(nullptr);
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}
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for(int i = 0; i <= 0x3FFF; i++) {
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_vramHandlers.push_back(nullptr);
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}
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}
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@ -40,9 +62,18 @@ MemoryManager::~MemoryManager()
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void MemoryManager::RegisterIODevice(IMemoryHandler *handler)
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{
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std::array<int, 2> addresses = handler->GetIOAddresses();
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for(int i = addresses[0]; i < addresses[1]; i++) {
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_registerHandlers[i] = handler;
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vector<std::array<uint16_t, 2>> addresses = handler->GetRAMAddresses();
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for(std::array<uint16_t, 2> startEndAddr : addresses) {
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for(int i = startEndAddr[0]; i <= startEndAddr[1]; i++) {
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_ramHandlers[i] = handler;
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}
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}
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addresses = handler->GetVRAMAddresses();
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for(std::array<uint16_t, 2> startEndAddr : addresses) {
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for(int i = startEndAddr[0]; i <= startEndAddr[1]; i++) {
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_vramHandlers[i] = handler;
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}
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}
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}
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@ -82,4 +113,21 @@ uint16_t MemoryManager::ReadWord(uint16_t addr)
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uint8_t hi = Read(addr+1);
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return lo | hi << 8;
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}
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uint8_t MemoryManager::ReadVRAM(uint16_t addr)
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{
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if(addr <= 0x1FFF) {
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return ReadMappedVRAM(addr & 0x1FFF);
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} else {
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return _videoRAM[addr & 0x3FFF];
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}
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}
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void MemoryManager::WriteVRAM(uint16_t addr, uint8_t value)
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{
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if(addr <= 0x1FFF) {
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WriteMappedVRAM(addr, value);
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} else {
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_videoRAM[addr & 0x3FFF] = value;
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}
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}
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@ -8,15 +8,21 @@ class MemoryManager
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private:
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const int InternalRAMSize = 0x800;
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const int SRAMSize = 0x2000;
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const int VRAMSize = 0x4000;
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uint8_t *_internalRAM;
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uint8_t *_expansionRAM;
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uint8_t *_SRAM;
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uint8_t *_videoRAM;
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vector<IMemoryHandler*> _registerHandlers;
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vector<IMemoryHandler*> _ramHandlers;
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vector<IMemoryHandler*> _vramHandlers;
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inline uint8_t ReadRegister(uint16_t addr);
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inline void WriteRegister(uint16_t addr, uint8_t value);
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uint8_t ReadRegister(uint16_t addr);
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void WriteRegister(uint16_t addr, uint8_t value);
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uint8_t ReadMappedVRAM(uint16_t addr);
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void WriteMappedVRAM(uint16_t addr, uint8_t value);
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public:
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MemoryManager();
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@ -25,8 +31,12 @@ class MemoryManager
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void RegisterIODevice(IMemoryHandler *handler);
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uint8_t Read(uint16_t addr);
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void Write(uint16_t addr, uint8_t value);
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uint16_t ReadWord(uint16_t addr);
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void Write(uint16_t addr, uint8_t value);
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uint8_t ReadVRAM(uint16_t addr);
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void WriteVRAM(uint16_t addr, uint8_t value);
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char* GetTestResult()
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{
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17
Core/PPU.cpp
17
Core/PPU.cpp
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@ -2,8 +2,9 @@
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#include "PPU.h"
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#include "CPU.h"
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PPU::PPU()
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PPU::PPU(MemoryManager *memoryManager)
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{
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_memoryManager = memoryManager;
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_state = {};
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_flags = {};
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_statusFlags = {};
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@ -21,7 +22,7 @@ bool PPU::CheckFlag(PPUControlFlags flag)
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return false;
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}
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uint8_t PPU::MemoryRead(uint16_t addr)
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uint8_t PPU::ReadRAM(uint16_t addr)
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{
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switch(GetRegisterID(addr)) {
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case PPURegisters::Control:
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@ -36,13 +37,14 @@ uint8_t PPU::MemoryRead(uint16_t addr)
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return _spriteRAM[_state.SpriteRamAddr];
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case PPURegisters::VideoMemoryData:
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uint8_t returnValue = _memoryReadBuffer;
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_memoryReadBuffer = _videoRAM[_state.VideoRamAddr];
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_memoryReadBuffer = _memoryManager->ReadVRAM(_state.VideoRamAddr);
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_state.VideoRamAddr += _flags.VerticalWrite ? 32 : 1;
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return returnValue;
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}
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return 0;
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}
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void PPU::MemoryWrite(uint16_t addr, uint8_t value)
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void PPU::WriteRAM(uint16_t addr, uint8_t value)
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{
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switch(GetRegisterID(addr)) {
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case PPURegisters::Control:
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@ -72,7 +74,8 @@ void PPU::MemoryWrite(uint16_t addr, uint8_t value)
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_writeLow = !_writeLow;
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break;
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case PPURegisters::VideoMemoryData:
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_videoRAM[_state.VideoRamAddr&0x3FFF] = value;
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_memoryManager->WriteVRAM(_state.VideoRamAddr, value);
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_state.VideoRamAddr += _flags.VerticalWrite ? 32 : 1;
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break;
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}
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}
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@ -125,8 +128,8 @@ void PPU::Exec()
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/*if(_flags.BackgroundEnabled || _flags.SpritesEnabled) {
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//p->registers.vramAddress = p->registers.vramLatch;
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}*/
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} else if(_cycle == 339 && (_frameCount % 2 == 1)) {
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//Skip a cycle for odd frames
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} else if(_cycle == 339 && _flags.BackgroundEnabled && (_frameCount % 2 == 1)) {
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//Skip a cycle for odd frames, if background drawing is enabled
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_cycle++;
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}
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} else if(_scanline < 240) {
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17
Core/PPU.h
17
Core/PPU.h
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@ -1,7 +1,7 @@
|
|||
#pragma once
|
||||
|
||||
#include "stdafx.h"
|
||||
#include "IMemoryHandler.h"
|
||||
#include "MemoryManager.h"
|
||||
|
||||
enum PPURegisters
|
||||
{
|
||||
|
|
@ -53,12 +53,13 @@ struct PPUState
|
|||
class PPU : public IMemoryHandler
|
||||
{
|
||||
private:
|
||||
MemoryManager *_memoryManager;
|
||||
|
||||
PPUState _state;
|
||||
uint64_t _cycleCount;
|
||||
|
||||
uint8_t _memoryReadBuffer;
|
||||
uint8_t _spriteRAM[0x100];
|
||||
uint8_t _videoRAM[0x4000];
|
||||
|
||||
uint8_t *_outputBuffer;
|
||||
|
||||
|
|
@ -82,16 +83,16 @@ class PPU : public IMemoryHandler
|
|||
}
|
||||
|
||||
public:
|
||||
PPU();
|
||||
PPU(MemoryManager *memoryManager);
|
||||
~PPU();
|
||||
|
||||
std::array<int, 2> GetIOAddresses()
|
||||
{
|
||||
return std::array<int, 2> {{ 0x2000, 0x3FFF }};
|
||||
vector<std::array<uint16_t, 2>> GetRAMAddresses()
|
||||
{
|
||||
return{ { { 0x2000, 0x3FFF } }, { {0x4014, 0x4014 } } };
|
||||
}
|
||||
|
||||
uint8_t MemoryRead(uint16_t addr);
|
||||
void MemoryWrite(uint16_t addr, uint8_t value);
|
||||
uint8_t ReadRAM(uint16_t addr);
|
||||
void WriteRAM(uint16_t addr, uint8_t value);
|
||||
|
||||
void Exec();
|
||||
};
|
||||
Loading…
Add table
Reference in a new issue