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Linux: Fixed compiler warnings

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This commit is contained in:
Sour 2019-01-26 16:49:26 -05:00
parent d7a850b59e
commit 5e5e1a5e60
6 changed files with 22 additions and 9 deletions
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2
Core/Assembler.cpp
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@ -121,7 +121,7 @@ AssemblerSpecialCodes Assembler::GetLineData(std::smatch match, LineData &lineDa
} else if(lineData.Operand.size() <= 8) {
lineData.IsHex = true;
int value = 0;
for(int i = 0; i < lineData.Operand.size(); i++) {
for(size_t i = 0; i < lineData.Operand.size(); i++) {
value <<= 1;
value |= lineData.Operand[i] == '1' ? 1 : 0;
}

11
Core/BaseMapper.cpp
View file

@ -559,14 +559,17 @@ void BaseMapper::Initialize(RomData &romData)
_romInfo = romData.Info;
_batteryFilename = GetBatteryFilename();
_saveRamSize = romData.SaveRamSize;
_workRamSize = romData.WorkRamSize;
if(_saveRamSize == -1 || ForceSaveRamSize()) {
if(romData.SaveRamSize == -1 || ForceSaveRamSize()) {
_saveRamSize = GetSaveRamSize();
} else {
_saveRamSize = romData.SaveRamSize;
}
if(_workRamSize == -1 || ForceWorkRamSize()) {
if(romData.WorkRamSize == -1 || ForceWorkRamSize()) {
_workRamSize = GetWorkRamSize();
} else {
_workRamSize = romData.WorkRamSize;
}
_allowRegisterRead = AllowRegisterRead();

6
Core/Eeprom24C01.h
View file

@ -41,7 +41,7 @@ public:
_console->GetBatteryManager()->SaveBattery(".eeprom128", _romData, 128);
}
void Write(uint8_t scl, uint8_t sda)
void Write(uint8_t scl, uint8_t sda) override
{
if(_prevScl && scl && sda < _prevSda) {
//"START is identified by a high to low transition of the SDA line while the clock SCL is *stable* in the high state"
@ -82,6 +82,8 @@ public:
_nextMode = Mode::Idle;
}
break;
default: break;
}
} else if(scl < _prevScl) {
//Clock fall
@ -118,6 +120,8 @@ public:
_address = (_address + 1) & 0x7F;
}
break;
default: break;
}
}
_prevScl = scl;

6
Core/Eeprom24C02.h
View file

@ -41,7 +41,7 @@ public:
_console->GetBatteryManager()->SaveBattery(".eeprom256", _romData, 256);
}
void Write(uint8_t scl, uint8_t sda)
void Write(uint8_t scl, uint8_t sda) override
{
if(_prevScl && scl && sda < _prevSda) {
//"START is identified by a high to low transition of the SDA line while the clock SCL is *stable* in the high state"
@ -55,6 +55,7 @@ public:
} else if(scl > _prevScl) {
//Clock rise
switch(_mode) {
default: break;
case Mode::ChipAddress: WriteBit(_chipAddress, sda); break;
case Mode::Address: WriteBit(_address, sda); break;
case Mode::Read: ReadBit(); break;
@ -138,6 +139,9 @@ public:
_counter = 0;
_output = 1;
break;
default:
break;
}
}
_prevScl = scl;

2
Core/LuaApi.cpp
View file

@ -769,7 +769,9 @@ int LuaApi::GetAccessCounters(lua_State *lua)
DebugMemoryType debugMemoryType;
uint32_t size = 0;
switch(memoryType) {
default:
case AddressType::Register: error("Invalid memory type"); break;
case AddressType::InternalRam:
debugMemoryType = DebugMemoryType::InternalRam;
size = 0x2000;

4
Core/MMC5.h
View file

@ -316,7 +316,7 @@ protected:
virtual uint32_t GetSaveRamSize() override
{
if(IsNes20()) {
return _saveRamSize;
return _romInfo.NesHeader.GetSaveRamSize();
} else if(_romInfo.IsInDatabase) {
return _romInfo.DatabaseInfo.SaveRamSize;
} else {
@ -328,7 +328,7 @@ protected:
virtual uint32_t GetWorkRamSize() override
{
if(IsNes20()) {
return _workRamSize + MMC5::ExRamSize;
return _romInfo.NesHeader.GetWorkRamSize() + MMC5::ExRamSize;
} else if(_romInfo.IsInDatabase) {
return _romInfo.DatabaseInfo.WorkRamSize + MMC5::ExRamSize;
} else {