diff --git a/Core/Core.vcxproj b/Core/Core.vcxproj
index 78f232f8..ea7e5de3 100644
--- a/Core/Core.vcxproj
+++ b/Core/Core.vcxproj
@@ -619,6 +619,7 @@
+
diff --git a/Core/Core.vcxproj.filters b/Core/Core.vcxproj.filters
index 106a50ba..023f2edf 100644
--- a/Core/Core.vcxproj.filters
+++ b/Core/Core.vcxproj.filters
@@ -910,6 +910,9 @@
Nes\Mappers
+
+ Nes\Mappers
+
diff --git a/Core/MapperFactory.cpp b/Core/MapperFactory.cpp
index 9de6b478..3e7cacdd 100644
--- a/Core/MapperFactory.cpp
+++ b/Core/MapperFactory.cpp
@@ -140,6 +140,7 @@
#include "Sachen74LS374N.h"
#include "Sachen74LS374NB.h"
#include "Sachen8259.h"
+#include "StudyBox.h"
#include "Subor166.h"
#include "Sunsoft3.h"
#include "Sunsoft4.h"
@@ -189,8 +190,8 @@ Supported mappers:
|112|113|114|115| |117|118|119|120|121|===| |===| | |===|
|===|===|===|===|132|133| |===|136|137|138|139|140|141|142|143|
|144|145|146|147|148|149|150|151|152|153|154|155|156|157| |159|
-| |===| |163|164|165|166|167|168|===|170|171|172|173|===|175|
-|176|177|178|179|180|---|182|183|184|185| |187|188|189|===|191|
+|---|===| |163|164|165|166|167|168|===|170|171|172|173|===|175|
+|176|177|178|179|180|---|182|183|184|185|186|187|188|189|===|191|
|192|193|194|195| |197| | |200|201|202|203|204|205|206|207|
| |209|210|211|212|213|214| | | |218| | |221|222| |
| |225|226|227|228|229|230|231|232|233|234|235| |===|238|===|
@@ -363,6 +364,7 @@ BaseMapper* MapperFactory::GetMapperFromID(RomData &romData)
case 183: return new Mapper183();
case 184: return new Sunsoft184();
case 185: return new CNROM(true);
+ case 186: return new StudyBox();
case 187: return new MMC3_187();
case 188: return new BandaiKaraoke();
case 189: return new MMC3_189();
diff --git a/Core/StudyBox.h b/Core/StudyBox.h
new file mode 100644
index 00000000..f2111426
--- /dev/null
+++ b/Core/StudyBox.h
@@ -0,0 +1,64 @@
+#pragma once
+#include "stdafx.h"
+#include "BaseMapper.h"
+
+class StudyBox : public BaseMapper
+{
+private:
+ uint8_t _prgRamReg;
+
+protected:
+ virtual uint16_t RegisterStartAddress() { return 0x4200; }
+ virtual uint16_t RegisterEndAddress() { return 0x43FF; }
+ virtual bool AllowRegisterRead() { return true; }
+
+ virtual uint16_t GetPRGPageSize() { return 0x4000; }
+ virtual uint16_t GetCHRPageSize() { return 0x2000; }
+
+ virtual uint32_t GetSaveRamSize() { return 0xC00; }
+ virtual uint32_t GetSaveRamPageSize() { return 0xC00; }
+
+ virtual uint32_t GetWorkRamSize() { return 0x8000; }
+ virtual uint32_t GetWorkRamPageSize() { return 0x2000; }
+
+ void InitMapper()
+ {
+ _prgRamReg = 0;
+
+ SelectPRGPage(1, 0);
+ SelectCHRPage(0, 0);
+ SetCpuMemoryMapping(0x4400, 0x4FFF, 0, PrgMemoryType::SaveRam);
+
+ UpdateState();
+ }
+
+ void StreamState(bool saving)
+ {
+ BaseMapper::StreamState(saving);
+ Stream(_prgRamReg);
+ }
+
+ uint8_t ReadRegister(uint16_t addr)
+ {
+ switch(addr) {
+ case 0x4200: case 0x4201: case 0x4203: return 0x00;
+ case 0x4202: return 0x40;
+ default: return 0xFF;
+ }
+ }
+
+ void UpdateState()
+ {
+ SetCpuMemoryMapping(0x6000, 0x7FFF, _prgRamReg, PrgMemoryType::WorkRam);
+ }
+
+ void WriteRegister(uint16_t addr, uint8_t value)
+ {
+ if(addr & 0x4203) {
+ switch(addr & 0x03) {
+ case 0: _prgRamReg = value >> 6; UpdateState(); break;
+ case 1: SelectPRGPage(0, value); break;
+ }
+ }
+ }
+};
\ No newline at end of file