Linux: Fixed all clang warnings
This commit is contained in:
parent
a6579fbfdb
commit
b4489ed0f7
264 changed files with 1249 additions and 1254 deletions
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@ -19,7 +19,7 @@ private:
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uint32_t _cyclesDown = 0;
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uint32_t _cyclesDown = 0;
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public:
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public:
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void StreamState(bool saving)
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void StreamState(bool saving) override
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{
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{
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Stream(_lastCycle, _cyclesDown);
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Stream(_lastCycle, _cyclesDown);
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}
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}
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@ -5,8 +5,8 @@
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class A65AS : public BaseMapper
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class A65AS : public BaseMapper
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{
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{
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protected:
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protected:
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uint16_t GetPRGPageSize() { return 0x4000; }
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uint16_t GetPRGPageSize() override { return 0x4000; }
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uint16_t GetCHRPageSize() { return 0x2000; }
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uint16_t GetCHRPageSize() override { return 0x2000; }
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void InitMapper() override
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void InitMapper() override
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{
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{
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@ -47,7 +47,7 @@ class APU : public Snapshotable, public IMemoryHandler
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static void FrameCounterTick(FrameType type);
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static void FrameCounterTick(FrameType type);
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protected:
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protected:
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void StreamState(bool saving);
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void StreamState(bool saving) override;
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public:
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public:
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APU(MemoryManager* memoryManager);
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APU(MemoryManager* memoryManager);
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@ -56,9 +56,9 @@ class APU : public Snapshotable, public IMemoryHandler
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void Reset(bool softReset);
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void Reset(bool softReset);
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void SetNesModel(NesModel model, bool forceInit = false);
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void SetNesModel(NesModel model, bool forceInit = false);
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uint8_t ReadRAM(uint16_t addr);
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uint8_t ReadRAM(uint16_t addr) override;
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void WriteRAM(uint16_t addr, uint8_t value);
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void WriteRAM(uint16_t addr, uint8_t value) override;
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void GetMemoryRanges(MemoryRanges &ranges);
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void GetMemoryRanges(MemoryRanges &ranges) override;
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void Exec();
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void Exec();
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10
Core/AXROM.h
10
Core/AXROM.h
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@ -5,18 +5,18 @@
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class AXROM : public BaseMapper
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class AXROM : public BaseMapper
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{
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{
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protected:
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protected:
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virtual uint16_t GetPRGPageSize() { return 0x8000; }
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virtual uint16_t GetPRGPageSize() override { return 0x8000; }
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virtual uint16_t GetCHRPageSize() { return 0x2000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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void InitMapper()
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void InitMapper() override
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{
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{
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SelectPRGPage(0, 0);
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SelectPRGPage(0, 0);
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SelectCHRPage(0, 0);
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SelectCHRPage(0, 0);
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}
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}
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bool HasBusConflicts() { return _subMapperID == 2; }
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bool HasBusConflicts() override { return _subMapperID == 2; }
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void WriteRegister(uint16_t addr, uint8_t value)
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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{
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SelectPRGPage(0, value & 0x0F);
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SelectPRGPage(0, value & 0x0F);
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@ -22,7 +22,7 @@ protected:
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UpdateState();
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UpdateState();
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}
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}
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void StreamState(bool saving)
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void StreamState(bool saving) override
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{
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{
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BaseMapper::StreamState(saving);
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BaseMapper::StreamState(saving);
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Stream(_reg);
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Stream(_reg);
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@ -10,10 +10,10 @@ private:
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uint8_t _mirroringBit;
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uint8_t _mirroringBit;
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protected:
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protected:
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virtual uint16_t GetPRGPageSize() { return 0x4000; }
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virtual uint16_t GetPRGPageSize() override { return 0x4000; }
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virtual uint16_t GetCHRPageSize() { return 0x2000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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void InitMapper()
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void InitMapper() override
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{
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{
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_selectedReg = 0;
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_selectedReg = 0;
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memset(_regs, 0, sizeof(_regs));
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memset(_regs, 0, sizeof(_regs));
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@ -23,7 +23,7 @@ protected:
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SelectPRGPage(1, -1);
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SelectPRGPage(1, -1);
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}
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}
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void StreamState(bool saving)
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void StreamState(bool saving) override
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{
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{
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BaseMapper::StreamState(saving);
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BaseMapper::StreamState(saving);
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@ -76,7 +76,7 @@ protected:
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}
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}
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value)
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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{
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if(addr <= 0x5FFF) {
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if(addr <= 0x5FFF) {
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_selectedReg = ((value & 0x80) >> 6) | (value & 0x01);
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_selectedReg = ((value & 0x80) >> 6) | (value & 0x01);
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@ -5,21 +5,21 @@
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class ActionEnterprises : public BaseMapper
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class ActionEnterprises : public BaseMapper
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{
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{
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protected:
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protected:
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virtual uint16_t GetPRGPageSize() { return 0x4000; }
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virtual uint16_t GetPRGPageSize() override { return 0x4000; }
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virtual uint16_t GetCHRPageSize() { return 0x2000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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void InitMapper()
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void InitMapper() override
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{
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{
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WriteRegister(0x8000, 0);
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WriteRegister(0x8000, 0);
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}
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}
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virtual void Reset(bool softReset)
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virtual void Reset(bool softReset) override
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{
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{
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WriteRegister(0x8000, 0);
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WriteRegister(0x8000, 0);
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value)
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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{
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uint8_t chipSelect = (addr >> 11) & 0x03;
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uint8_t chipSelect = (addr >> 11) & 0x03;
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@ -44,7 +44,7 @@ protected:
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}
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}
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public:
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public:
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virtual void Reset(bool softReset)
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virtual void Reset(bool softReset) override
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{
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{
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ApuLengthCounter::Reset(softReset);
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ApuLengthCounter::Reset(softReset);
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@ -56,7 +56,7 @@ public:
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_counter = 0;
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_counter = 0;
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}
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}
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virtual void StreamState(bool saving)
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virtual void StreamState(bool saving) override
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{
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{
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ApuLengthCounter::StreamState(saving);
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ApuLengthCounter::StreamState(saving);
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@ -62,7 +62,7 @@ public:
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_writeDelayCounter = -1;
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_writeDelayCounter = -1;
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}
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}
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void StreamState(bool saving)
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void StreamState(bool saving) override
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{
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{
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Stream(_nextIrqCycle, _previousCycle, _currentStep, _stepMode, _inhibitIRQ, _nesModel, _blockFrameCounterTick, _writeDelayCounter, _newValue);
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Stream(_nextIrqCycle, _previousCycle, _currentStep, _stepMode, _inhibitIRQ, _nesModel, _blockFrameCounterTick, _writeDelayCounter, _newValue);
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@ -185,17 +185,17 @@ public:
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return false;
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return false;
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}
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}
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void GetMemoryRanges(MemoryRanges &ranges)
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void GetMemoryRanges(MemoryRanges &ranges) override
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{
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{
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ranges.AddHandler(MemoryOperation::Write, 0x4017);
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ranges.AddHandler(MemoryOperation::Write, 0x4017);
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}
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}
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uint8_t ReadRAM(uint16_t addr)
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uint8_t ReadRAM(uint16_t addr) override
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{
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{
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return 0;
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return 0;
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}
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}
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void WriteRAM(uint16_t addr, uint8_t value)
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void WriteRAM(uint16_t addr, uint8_t value) override
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{
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{
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APU::StaticRun();
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APU::StaticRun();
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_newValue = value;
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_newValue = value;
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return ApuLengthCounter::_needToRun;
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return ApuLengthCounter::_needToRun;
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}
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}
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virtual void Reset(bool softReset)
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virtual void Reset(bool softReset) override
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{
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{
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BaseApuChannel::Reset(softReset);
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BaseApuChannel::Reset(softReset);
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ApuLengthCounter::_needToRun = false;
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ApuLengthCounter::_needToRun = false;
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}
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}
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virtual void StreamState(bool saving)
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virtual void StreamState(bool saving) override
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{
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{
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BaseApuChannel::StreamState(saving);
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BaseApuChannel::StreamState(saving);
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Stream(_enabled, _lengthCounterHalt, _newHaltValue, _lengthCounter, _lengthCounterPreviousValue, _lengthCounterReloadValue);
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Stream(_enabled, _lengthCounterHalt, _newHaltValue, _lengthCounter, _lengthCounterPreviousValue, _lengthCounterReloadValue);
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}
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}
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bool GetStatus()
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bool GetStatus() override
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{
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{
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return _lengthCounter > 0;
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return _lengthCounter > 0;
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}
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}
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virtual void Run(uint32_t targetCycle)
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virtual void Run(uint32_t targetCycle) override
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{
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{
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ApuLengthCounter::_needToRun = false;
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ApuLengthCounter::_needToRun = false;
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_lengthCounterHalt = _newHaltValue;
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_lengthCounterHalt = _newHaltValue;
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@ -12,17 +12,17 @@ private:
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bool IsButtonPressed();
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bool IsButtonPressed();
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protected:
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protected:
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uint8_t RefreshState();
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uint8_t RefreshState() override;
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virtual void StreamState(bool saving);
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virtual void StreamState(bool saving) override;
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public:
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public:
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using BaseControlDevice::BaseControlDevice;
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using BaseControlDevice::BaseControlDevice;
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uint8_t GetPortOutput();
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uint8_t GetPortOutput() override;
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void RefreshStateBuffer();
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void RefreshStateBuffer() override;
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virtual uint32_t GetNetPlayState();
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virtual uint32_t GetNetPlayState() override;
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uint8_t ProcessNetPlayState(uint32_t netplayState);
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uint8_t ProcessNetPlayState(uint32_t netplayState) override;
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uint8_t GetExpansionPortOutput(uint8_t port);
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uint8_t GetExpansionPortOutput(uint8_t port);
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};
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};
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AutoRomTest();
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AutoRomTest();
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virtual ~AutoRomTest();
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virtual ~AutoRomTest();
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void ProcessNotification(ConsoleNotificationType type, void* parameter);
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void ProcessNotification(ConsoleNotificationType type, void* parameter) override;
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void Record(string filename, bool reset);
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void Record(string filename, bool reset);
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void RecordFromMovie(string testFilename, string movieFilename);
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void RecordFromMovie(string testFilename, string movieFilename);
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void RecordFromTest(string newTestFilename, string existingTestFilename);
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void RecordFromTest(string newTestFilename, string existingTestFilename);
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uint8_t _chrReg[8];
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uint8_t _chrReg[8];
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protected:
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protected:
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uint16_t GetPRGPageSize() { return 0x2000; }
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uint16_t GetPRGPageSize() override { return 0x2000; }
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uint16_t GetCHRPageSize() { return 0x400; }
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uint16_t GetCHRPageSize() override { return 0x400; }
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void InitMapper() override
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void InitMapper() override
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{
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{
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@ -9,10 +9,10 @@ private:
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uint8_t _prgPage;
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uint8_t _prgPage;
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protected:
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protected:
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virtual uint16_t GetPRGPageSize() { return 0x4000; }
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virtual uint16_t GetPRGPageSize() override { return 0x4000; }
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virtual uint16_t GetCHRPageSize() { return 0x2000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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void InitMapper()
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void InitMapper() override
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{
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{
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_prgPage = 0;
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_prgPage = 0;
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_prgBlock = 0;
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_prgBlock = 0;
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SelectCHRPage(0, 0);
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SelectCHRPage(0, 0);
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value)
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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{
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if(addr >= 0xC000) {
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if(addr >= 0xC000) {
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_prgPage = value & 0x03;
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_prgPage = value & 0x03;
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SelectPRGPage(1, (_prgBlock << 2) | 3);
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SelectPRGPage(1, (_prgBlock << 2) | 3);
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}
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}
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virtual void StreamState(bool saving)
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virtual void StreamState(bool saving) override
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{
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{
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BaseMapper::StreamState(saving);
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BaseMapper::StreamState(saving);
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Stream(_prgBlock, _prgPage);
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Stream(_prgBlock, _prgPage);
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bool _bf9097Mode = false; //Auto-detect for firehawk
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bool _bf9097Mode = false; //Auto-detect for firehawk
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protected:
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protected:
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virtual uint16_t GetPRGPageSize() { return 0x4000; }
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virtual uint16_t GetPRGPageSize() override { return 0x4000; }
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virtual uint16_t GetCHRPageSize() { return 0x2000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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void InitMapper()
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void InitMapper() override
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{
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{
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if(_subMapperID == 1) {
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if(_subMapperID == 1) {
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_bf9097Mode = true;
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_bf9097Mode = true;
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SelectCHRPage(0, 0);
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SelectCHRPage(0, 0);
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value)
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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{
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if(addr == 0x9000) {
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if(addr == 0x9000) {
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//Firehawk uses $9000 to change mirroring
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//Firehawk uses $9000 to change mirroring
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}
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}
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}
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}
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virtual void StreamState(bool saving)
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virtual void StreamState(bool saving) override
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{
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{
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BaseMapper::StreamState(saving);
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BaseMapper::StreamState(saving);
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Stream(_bf9097Mode);
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Stream(_bf9097Mode);
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@ -8,10 +8,10 @@ private:
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bool _enableMirroringControl;
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bool _enableMirroringControl;
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protected:
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protected:
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virtual uint16_t GetPRGPageSize() { return 0x4000; }
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virtual uint16_t GetPRGPageSize() override { return 0x4000; }
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virtual uint16_t GetCHRPageSize() { return 0x2000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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void InitMapper()
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void InitMapper() override
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{
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{
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SelectPRGPage(0, 0);
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SelectPRGPage(0, 0);
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SelectPRGPage(1, -1);
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SelectPRGPage(1, -1);
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SetMirroringType(MirroringType::Vertical);
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SetMirroringType(MirroringType::Vertical);
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value)
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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{
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bool mirroringBit = (value & 0x80) == 0x80;
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bool mirroringBit = (value & 0x80) == 0x80;
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if(mirroringBit) {
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if(mirroringBit) {
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SelectCHRPage(0, value & 0x0F);
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SelectCHRPage(0, value & 0x0F);
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}
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}
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virtual void StreamState(bool saving)
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virtual void StreamState(bool saving) override
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{
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{
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BaseMapper::StreamState(saving);
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BaseMapper::StreamState(saving);
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Stream(_enableMirroringControl);
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Stream(_enableMirroringControl);
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@ -13,13 +13,13 @@ private:
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uint8_t _chrRegs[8];
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uint8_t _chrRegs[8];
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protected:
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protected:
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uint16_t GetPRGPageSize() { return 0x4000; }
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uint16_t GetPRGPageSize() override { return 0x4000; }
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uint16_t GetCHRPageSize() { return 0x400; }
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uint16_t GetCHRPageSize() override { return 0x400; }
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uint16_t RegisterStartAddress() { return 0x6000; }
|
uint16_t RegisterStartAddress() override { return 0x6000; }
|
||||||
uint16_t RegisterEndAddress() { return 0xFFFF; }
|
uint16_t RegisterEndAddress() override { return 0xFFFF; }
|
||||||
bool AllowRegisterRead() { return true; }
|
bool AllowRegisterRead() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
memset(_chrRegs, 0, sizeof(_chrRegs));
|
memset(_chrRegs, 0, sizeof(_chrRegs));
|
||||||
_irqEnabled = false;
|
_irqEnabled = false;
|
||||||
|
@ -41,7 +41,7 @@ protected:
|
||||||
SelectPRGPage(1, 0x0F);
|
SelectPRGPage(1, 0x0F);
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
|
|
||||||
|
@ -49,7 +49,7 @@ protected:
|
||||||
Stream(_irqEnabled, _irqCounter, _irqReload, _prgPage, _prgBankSelect, chrRegs);
|
Stream(_irqEnabled, _irqCounter, _irqReload, _prgPage, _prgBankSelect, chrRegs);
|
||||||
}
|
}
|
||||||
|
|
||||||
void ProcessCpuClock()
|
void ProcessCpuClock() override
|
||||||
{
|
{
|
||||||
if(_irqEnabled) {
|
if(_irqEnabled) {
|
||||||
//Checking counter before decrementing seems to be the only way to get both
|
//Checking counter before decrementing seems to be the only way to get both
|
||||||
|
@ -62,13 +62,13 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t ReadRegister(uint16_t addr)
|
uint8_t ReadRegister(uint16_t addr) override
|
||||||
{
|
{
|
||||||
//Pretend EEPROM data is always 0
|
//Pretend EEPROM data is always 0
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr & 0x000F) {
|
switch(addr & 0x000F) {
|
||||||
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
|
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
|
||||||
|
|
|
@ -7,11 +7,11 @@
|
||||||
class BandaiKaraoke : public BaseMapper
|
class BandaiKaraoke : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual bool AllowRegisterRead() { return true; }
|
virtual bool AllowRegisterRead() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
AddRegisterRange(0x6000, 0x7FFF, MemoryOperation::Read);
|
AddRegisterRange(0x6000, 0x7FFF, MemoryOperation::Read);
|
||||||
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
||||||
|
@ -21,13 +21,13 @@ protected:
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t ReadRegister(uint16_t addr)
|
uint8_t ReadRegister(uint16_t addr) override
|
||||||
{
|
{
|
||||||
//Microphone not implemented - always return A/B buttons as not pressed
|
//Microphone not implemented - always return A/B buttons as not pressed
|
||||||
return 0x03;
|
return 0x03;
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(value & 0x10) {
|
if(value & 0x10) {
|
||||||
//Select internal rom
|
//Select internal rom
|
||||||
|
|
|
@ -47,7 +47,7 @@ public:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
if(!saving) {
|
if(!saving) {
|
||||||
_previousCycle = 0;
|
_previousCycle = 0;
|
||||||
|
@ -91,7 +91,7 @@ public:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t ReadRAM(uint16_t addr)
|
uint8_t ReadRAM(uint16_t addr) override
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -53,7 +53,7 @@ protected:
|
||||||
virtual uint8_t RefreshState() = 0;
|
virtual uint8_t RefreshState() = 0;
|
||||||
virtual uint8_t ProcessNetPlayState(uint32_t netplayState);
|
virtual uint8_t ProcessNetPlayState(uint32_t netplayState);
|
||||||
|
|
||||||
virtual void StreamState(bool saving);
|
virtual void StreamState(bool saving) override;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
//Used by controller-specific code to get the current state (buttons, position, etc)
|
//Used by controller-specific code to get the current state (buttons, position, etc)
|
||||||
|
|
|
@ -11,7 +11,7 @@ private:
|
||||||
protected:
|
protected:
|
||||||
virtual void ClockAudio() = 0;
|
virtual void ClockAudio() = 0;
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
Stream(_clocksNeeded);
|
Stream(_clocksNeeded);
|
||||||
}
|
}
|
||||||
|
|
|
@ -16,7 +16,7 @@ protected:
|
||||||
//"Few FDS NSFs write to this register. The BIOS initializes this to $FF."
|
//"Few FDS NSFs write to this register. The BIOS initializes this to $FF."
|
||||||
uint8_t _masterSpeed = 0xFF;
|
uint8_t _masterSpeed = 0xFF;
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
Stream(_speed, _gain, _envelopeOff, _volumeIncrease, _frequency, _timer, _masterSpeed);
|
Stream(_speed, _gain, _envelopeOff, _volumeIncrease, _frequency, _timer, _masterSpeed);
|
||||||
}
|
}
|
||||||
|
|
|
@ -213,7 +213,7 @@ void BaseMapper::SelectPRGPage(uint16_t slot, uint16_t page, PrgMemoryType memor
|
||||||
{
|
{
|
||||||
_prgPageNumbers[slot] = page;
|
_prgPageNumbers[slot] = page;
|
||||||
|
|
||||||
if(_prgSize < PrgAddressRangeSize && GetPRGPageSize() > _prgSize) {
|
if(_prgSize < 0x8000 && GetPRGPageSize() > _prgSize) {
|
||||||
//Total PRG size is smaller than available memory range, map the entire PRG to all slots
|
//Total PRG size is smaller than available memory range, map the entire PRG to all slots
|
||||||
//i.e same logic as NROM (mapper 0) when PRG is 16kb
|
//i.e same logic as NROM (mapper 0) when PRG is 16kb
|
||||||
//Needed by "Pyramid" (mapper 79)
|
//Needed by "Pyramid" (mapper 79)
|
||||||
|
@ -221,7 +221,7 @@ void BaseMapper::SelectPRGPage(uint16_t slot, uint16_t page, PrgMemoryType memor
|
||||||
MessageManager::DisplayMessage("Debug", "PrgSizeWarning");
|
MessageManager::DisplayMessage("Debug", "PrgSizeWarning");
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
for(slot = 0; slot < PrgAddressRangeSize / _prgSize; slot++) {
|
for(slot = 0; slot < 0x8000 / _prgSize; slot++) {
|
||||||
uint16_t startAddr = 0x8000 + slot * _prgSize;
|
uint16_t startAddr = 0x8000 + slot * _prgSize;
|
||||||
uint16_t endAddr = startAddr + _prgSize - 1;
|
uint16_t endAddr = startAddr + _prgSize - 1;
|
||||||
SetCpuMemoryMapping(startAddr, endAddr, 0, memoryType);
|
SetCpuMemoryMapping(startAddr, endAddr, 0, memoryType);
|
||||||
|
|
|
@ -57,9 +57,6 @@ struct CartridgeState
|
||||||
class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificationListener
|
class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificationListener
|
||||||
{
|
{
|
||||||
private:
|
private:
|
||||||
const uint16_t PrgAddressRangeSize = 0x8000;
|
|
||||||
const uint16_t ChrAddressRangeSize = 0x2000;
|
|
||||||
|
|
||||||
MirroringType _mirroringType;
|
MirroringType _mirroringType;
|
||||||
string _batteryFilename;
|
string _batteryFilename;
|
||||||
|
|
||||||
|
@ -183,7 +180,7 @@ protected:
|
||||||
void AddRegisterRange(uint16_t startAddr, uint16_t endAddr, MemoryOperation operation = MemoryOperation::Any);
|
void AddRegisterRange(uint16_t startAddr, uint16_t endAddr, MemoryOperation operation = MemoryOperation::Any);
|
||||||
void RemoveRegisterRange(uint16_t startAddr, uint16_t endAddr, MemoryOperation operation = MemoryOperation::Any);
|
void RemoveRegisterRange(uint16_t startAddr, uint16_t endAddr, MemoryOperation operation = MemoryOperation::Any);
|
||||||
|
|
||||||
virtual void StreamState(bool saving);
|
virtual void StreamState(bool saving) override;
|
||||||
|
|
||||||
uint8_t* GetNametable(uint8_t index);
|
uint8_t* GetNametable(uint8_t index);
|
||||||
void AddNametable(uint8_t index, uint8_t *nametable);
|
void AddNametable(uint8_t index, uint8_t *nametable);
|
||||||
|
@ -201,8 +198,8 @@ public:
|
||||||
virtual void SetNesModel(NesModel model) { }
|
virtual void SetNesModel(NesModel model) { }
|
||||||
virtual void ProcessCpuClock() { }
|
virtual void ProcessCpuClock() { }
|
||||||
virtual void NotifyVRAMAddressChange(uint16_t addr);
|
virtual void NotifyVRAMAddressChange(uint16_t addr);
|
||||||
void ProcessNotification(ConsoleNotificationType type, void* parameter);
|
void ProcessNotification(ConsoleNotificationType type, void* parameter) override;
|
||||||
virtual void GetMemoryRanges(MemoryRanges &ranges);
|
virtual void GetMemoryRanges(MemoryRanges &ranges) override;
|
||||||
|
|
||||||
void ApplyCheats();
|
void ApplyCheats();
|
||||||
void SaveBattery();
|
void SaveBattery();
|
||||||
|
@ -214,8 +211,8 @@ public:
|
||||||
uint32_t GetPrgCrc32();
|
uint32_t GetPrgCrc32();
|
||||||
string GetRomName();
|
string GetRomName();
|
||||||
|
|
||||||
uint8_t ReadRAM(uint16_t addr);
|
uint8_t ReadRAM(uint16_t addr) override;
|
||||||
virtual void WriteRAM(uint16_t addr, uint8_t value);
|
virtual void WriteRAM(uint16_t addr, uint8_t value) override;
|
||||||
void WritePrgRam(uint16_t addr, uint8_t value);
|
void WritePrgRam(uint16_t addr, uint8_t value);
|
||||||
|
|
||||||
uint8_t InternalReadVRAM(uint16_t addr);
|
uint8_t InternalReadVRAM(uint16_t addr);
|
||||||
|
|
|
@ -21,7 +21,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_prgReg, _chrReg);
|
Stream(_prgReg, _chrReg);
|
||||||
|
|
|
@ -12,7 +12,7 @@ protected:
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
BaseMapper::Reset(softReset);
|
BaseMapper::Reset(softReset);
|
||||||
WriteRegister(0x8000, 0);
|
WriteRegister(0x8000, 0);
|
||||||
|
|
|
@ -19,7 +19,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_regs[0], _regs[1], _mode);
|
Stream(_regs[0], _regs[1], _mode);
|
||||||
|
|
|
@ -5,8 +5,8 @@
|
||||||
class Bmc190in1 : public BaseMapper
|
class Bmc190in1 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x4000; }
|
uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
|
|
@ -7,22 +7,22 @@ class Bmc235 : public BaseMapper
|
||||||
private:
|
private:
|
||||||
bool _openBus = false;
|
bool _openBus = false;
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPrgPage2x(0, 0);
|
SelectPrgPage2x(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
SelectPrgPage2x(0, 0);
|
SelectPrgPage2x(0, 0);
|
||||||
_openBus = false;
|
_openBus = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_openBus);
|
Stream(_openBus);
|
||||||
|
@ -31,7 +31,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
SetMirroringType((addr & 0x0400) ? MirroringType::ScreenAOnly : (addr & 0x2000) ? MirroringType::Horizontal : MirroringType::Vertical);
|
SetMirroringType((addr & 0x0400) ? MirroringType::ScreenAOnly : (addr & 0x2000) ? MirroringType::Horizontal : MirroringType::Vertical);
|
||||||
|
|
||||||
|
|
|
@ -5,15 +5,15 @@
|
||||||
class Bmc255 : public BaseMapper
|
class Bmc255 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
WriteRegister(0x8000, 0);
|
WriteRegister(0x8000, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
uint8_t prgBit = (addr & 0x1000) ? 0 : 1;
|
uint8_t prgBit = (addr & 0x1000) ? 0 : 1;
|
||||||
uint8_t bank = ((addr >> 8) & 0x40) | ((addr >> 6) & 0x3F);
|
uint8_t bank = ((addr >> 8) & 0x40) | ((addr >> 6) & 0x3F);
|
||||||
|
|
14
Core/Bmc51.h
14
Core/Bmc51.h
|
@ -9,19 +9,19 @@ private:
|
||||||
uint8_t _mode;
|
uint8_t _mode;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
uint16_t RegisterStartAddress() { return 0x6000; }
|
uint16_t RegisterStartAddress() override { return 0x6000; }
|
||||||
uint16_t RegisterEndAddress() { return 0xFFFF; }
|
uint16_t RegisterEndAddress() override { return 0xFFFF; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
_bank = 0;
|
_bank = 0;
|
||||||
_mode = 1;
|
_mode = 1;
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_bank, _mode);
|
Stream(_bank, _mode);
|
||||||
|
@ -44,7 +44,7 @@ protected:
|
||||||
SetMirroringType(_mode == 0x03 ? MirroringType::Horizontal : MirroringType::Vertical);
|
SetMirroringType(_mode == 0x03 ? MirroringType::Horizontal : MirroringType::Vertical);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr <= 0x7FFF) {
|
if(addr <= 0x7FFF) {
|
||||||
_mode = ((value >> 3) & 0x02) | ((value >> 1) & 0x01);
|
_mode = ((value >> 3) & 0x02) | ((value >> 1) & 0x01);
|
||||||
|
|
12
Core/Bmc63.h
12
Core/Bmc63.h
|
@ -8,20 +8,20 @@ private:
|
||||||
bool _openBus;
|
bool _openBus;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
WriteRegister(0x8000, 0);
|
WriteRegister(0x8000, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
_openBus = false;
|
_openBus = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_openBus);
|
Stream(_openBus);
|
||||||
|
@ -30,7 +30,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
_openBus = ((addr & 0x0300) == 0x0300);
|
_openBus = ((addr & 0x0300) == 0x0300);
|
||||||
|
|
||||||
|
|
|
@ -16,7 +16,7 @@ protected:
|
||||||
AddRegisterRange(0x5000, 0x5003, MemoryOperation::Write);
|
AddRegisterRange(0x5000, 0x5003, MemoryOperation::Write);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
BaseMapper::Reset(softReset);
|
BaseMapper::Reset(softReset);
|
||||||
|
|
||||||
|
@ -27,7 +27,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_regs[0], _regs[1], _regs[2], _regs[3]);
|
Stream(_regs[0], _regs[1], _regs[2], _regs[3]);
|
||||||
|
|
|
@ -13,9 +13,9 @@ private:
|
||||||
bool _useOuterBank;
|
bool _useOuterBank;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x4000; }
|
uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
bool AllowRegisterRead() { return true; }
|
bool AllowRegisterRead() override { return true; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
|
|
@ -12,7 +12,7 @@ protected:
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
BaseMapper::Reset(softReset);
|
BaseMapper::Reset(softReset);
|
||||||
WriteRegister(0x8000, 0);
|
WriteRegister(0x8000, 0);
|
||||||
|
|
|
@ -12,7 +12,7 @@ protected:
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
BaseMapper::Reset(softReset);
|
BaseMapper::Reset(softReset);
|
||||||
|
|
||||||
|
|
|
@ -12,7 +12,7 @@ protected:
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
BaseMapper::Reset(softReset);
|
BaseMapper::Reset(softReset);
|
||||||
WriteRegister(0x8000, 0);
|
WriteRegister(0x8000, 0);
|
||||||
|
|
|
@ -5,16 +5,16 @@
|
||||||
class BnRom : public BaseMapper
|
class BnRom : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
//"While the original BNROM board connects only 2 bits, it is recommended that emulators implement this as an 8-bit register allowing selection of up to 8 MB PRG ROM if present."
|
//"While the original BNROM board connects only 2 bits, it is recommended that emulators implement this as an 8-bit register allowing selection of up to 8 MB PRG ROM if present."
|
||||||
SelectPRGPage(0, value);
|
SelectPRGPage(0, value);
|
||||||
|
|
|
@ -8,8 +8,8 @@ private:
|
||||||
uint8_t _dipSwitch = 0;
|
uint8_t _dipSwitch = 0;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x2000; }
|
uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x800; }
|
uint16_t GetCHRPageSize() override { return 0x800; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
@ -19,13 +19,13 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_dipSwitch);
|
Stream(_dipSwitch);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
if(softReset) {
|
if(softReset) {
|
||||||
_dipSwitch = (_dipSwitch + 1) & 0x03;
|
_dipSwitch = (_dipSwitch + 1) & 0x03;
|
||||||
|
|
10
Core/CNROM.h
10
Core/CNROM.h
|
@ -8,18 +8,18 @@ private:
|
||||||
bool _enableCopyProtection;
|
bool _enableCopyProtection;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
bool HasBusConflicts() { return (_mapperID == 3 && _subMapperID == 2) || _mapperID == 185; }
|
bool HasBusConflicts() override { return (_mapperID == 3 && _subMapperID == 2) || _mapperID == 185; }
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(_enableCopyProtection) {
|
if(_enableCopyProtection) {
|
||||||
//"if C AND $0F is nonzero, and if C does not equal $13: CHR is enabled"
|
//"if C AND $0F is nonzero, and if C does not equal $13: CHR is enabled"
|
||||||
|
|
|
@ -843,7 +843,7 @@ private:
|
||||||
}
|
}
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
void StreamState(bool saving);
|
void StreamState(bool saving) override;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
static const uint32_t ClockRateNtsc = 1789773;
|
static const uint32_t ClockRateNtsc = 1789773;
|
||||||
|
|
|
@ -9,17 +9,17 @@ private:
|
||||||
uint8_t _chrBank;
|
uint8_t _chrBank;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x8000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x8000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0xFFFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0xFFFF; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
AddRegisterRange(0x6000, 0x67FF, MemoryOperation::Write);
|
AddRegisterRange(0x6000, 0x67FF, MemoryOperation::Write);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
_chrBank = 0;
|
_chrBank = 0;
|
||||||
_prgBank = 0;
|
_prgBank = 0;
|
||||||
|
@ -27,13 +27,13 @@ protected:
|
||||||
WriteRegister(0x8000, 0);
|
WriteRegister(0x8000, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_prgBank, _chrBank);
|
Stream(_prgBank, _chrBank);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr <= 0x67FF) {
|
if(addr <= 0x67FF) {
|
||||||
_prgBank = addr & 0x07;
|
_prgBank = addr & 0x07;
|
||||||
|
|
|
@ -5,8 +5,8 @@
|
||||||
class Cc21 : public BaseMapper
|
class Cc21 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x8000; }
|
uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
|
|
@ -5,17 +5,17 @@
|
||||||
class ColorDreams : public BaseMapper
|
class ColorDreams : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual bool HasBusConflicts() { return true; }
|
virtual bool HasBusConflicts() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(_mapperID == 144) {
|
if(_mapperID == 144) {
|
||||||
//"This addition means that only the ROM's least significant bit always wins bus conflicts."
|
//"This addition means that only the ROM's least significant bit always wins bus conflicts."
|
||||||
|
|
|
@ -8,18 +8,18 @@ private:
|
||||||
uint8_t _regs[2];
|
uint8_t _regs[2];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x6000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x6000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0xFFFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0xFFFF; }
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
WriteRegister(0x6000, 0);
|
WriteRegister(0x6000, 0);
|
||||||
WriteRegister(0x8000, 0);
|
WriteRegister(0x8000, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void Reset(bool softReset)
|
virtual void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
WriteRegister(0x6000, 0);
|
WriteRegister(0x6000, 0);
|
||||||
WriteRegister(0x8000, 0);
|
WriteRegister(0x8000, 0);
|
||||||
|
@ -31,7 +31,7 @@ protected:
|
||||||
SelectCHRPage(0, ((_regs[0] & 0xF0) >> 1) | ((_regs[1] & 0x70) >> 4));
|
SelectCHRPage(0, ((_regs[0] & 0xF0) >> 1) | ((_regs[1] & 0x70) >> 4));
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr < 0x8000) {
|
if(addr < 0x8000) {
|
||||||
_regs[0] = value;
|
_regs[0] = value;
|
||||||
|
|
|
@ -37,7 +37,6 @@ class Console
|
||||||
string _romFilepath;
|
string _romFilepath;
|
||||||
|
|
||||||
bool _stop = false;
|
bool _stop = false;
|
||||||
bool _reset = false;
|
|
||||||
|
|
||||||
atomic<bool> _resetRequested;
|
atomic<bool> _resetRequested;
|
||||||
atomic<uint32_t> _lagCounter;
|
atomic<uint32_t> _lagCounter;
|
||||||
|
|
|
@ -40,7 +40,7 @@ class ControlManager : public Snapshotable, public IMemoryHandler
|
||||||
uint8_t GetPortValue(uint8_t port);
|
uint8_t GetPortValue(uint8_t port);
|
||||||
virtual void RefreshAllPorts();
|
virtual void RefreshAllPorts();
|
||||||
|
|
||||||
virtual void StreamState(bool saving);
|
virtual void StreamState(bool saving) override;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
ControlManager();
|
ControlManager();
|
||||||
|
@ -69,12 +69,12 @@ class ControlManager : public Snapshotable, public IMemoryHandler
|
||||||
|
|
||||||
static void BroadcastInput(uint8_t port, uint8_t state);
|
static void BroadcastInput(uint8_t port, uint8_t state);
|
||||||
|
|
||||||
virtual void GetMemoryRanges(MemoryRanges &ranges)
|
virtual void GetMemoryRanges(MemoryRanges &ranges) override
|
||||||
{
|
{
|
||||||
ranges.AddHandler(MemoryOperation::Read, 0x4016, 0x4017);
|
ranges.AddHandler(MemoryOperation::Read, 0x4016, 0x4017);
|
||||||
ranges.AddHandler(MemoryOperation::Write, 0x4016);
|
ranges.AddHandler(MemoryOperation::Write, 0x4016);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual uint8_t ReadRAM(uint16_t addr);
|
virtual uint8_t ReadRAM(uint16_t addr) override;
|
||||||
virtual void WriteRAM(uint16_t addr, uint8_t value);
|
virtual void WriteRAM(uint16_t addr, uint8_t value) override;
|
||||||
};
|
};
|
10
Core/CpRom.h
10
Core/CpRom.h
|
@ -5,18 +5,18 @@
|
||||||
class CpRom : public BaseMapper
|
class CpRom : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x1000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x1000; }
|
||||||
virtual uint32_t GetChrRamSize() { return 0x4000; }
|
virtual uint32_t GetChrRamSize() override { return 0x4000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
SetMirroringType(MirroringType::Vertical);
|
SetMirroringType(MirroringType::Vertical);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr >= 0x8000) {
|
if(addr >= 0x8000) {
|
||||||
SelectCHRPage(1, value & 0x03);
|
SelectCHRPage(1, value & 0x03);
|
||||||
|
|
|
@ -9,12 +9,12 @@ private:
|
||||||
uint8_t _chrHigh[8];
|
uint8_t _chrHigh[8];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t RegisterStartAddress() { return 0xC000; }
|
virtual uint16_t RegisterStartAddress() override { return 0xC000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0xC014; }
|
virtual uint16_t RegisterEndAddress() override { return 0xC014; }
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x400; }
|
virtual uint16_t GetCHRPageSize() override { return 0x400; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
memset(_chrLow, 0, sizeof(_chrLow));
|
memset(_chrLow, 0, sizeof(_chrLow));
|
||||||
memset(_chrHigh, 0, sizeof(_chrHigh));
|
memset(_chrHigh, 0, sizeof(_chrHigh));
|
||||||
|
@ -22,7 +22,7 @@ protected:
|
||||||
SetMirroringType(MirroringType::ScreenAOnly);
|
SetMirroringType(MirroringType::ScreenAOnly);
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
|
|
||||||
|
@ -42,7 +42,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr) {
|
switch(addr) {
|
||||||
case 0xC000: case 0xC001: case 0xC002: case 0xC003:
|
case 0xC000: case 0xC001: case 0xC002: case 0xC003:
|
||||||
|
|
|
@ -35,19 +35,19 @@ private:
|
||||||
void InitSample();
|
void InitSample();
|
||||||
void FillReadBuffer();
|
void FillReadBuffer();
|
||||||
|
|
||||||
void Clock();
|
void Clock() override;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
DeltaModulationChannel(AudioChannel channel, SoundMixer* mixer, MemoryManager* memoryManager);
|
DeltaModulationChannel(AudioChannel channel, SoundMixer* mixer, MemoryManager* memoryManager);
|
||||||
|
|
||||||
virtual void Reset(bool softReset);
|
virtual void Reset(bool softReset) override;
|
||||||
virtual void StreamState(bool saving);
|
virtual void StreamState(bool saving) override;
|
||||||
|
|
||||||
bool IrqPending(uint32_t cyclesToRun);
|
bool IrqPending(uint32_t cyclesToRun);
|
||||||
bool NeedToRun();
|
bool NeedToRun();
|
||||||
bool GetStatus();
|
bool GetStatus() override;
|
||||||
void GetMemoryRanges(MemoryRanges &ranges);
|
void GetMemoryRanges(MemoryRanges &ranges) override;
|
||||||
void WriteRAM(uint16_t addr, uint8_t value);
|
void WriteRAM(uint16_t addr, uint8_t value) override;
|
||||||
|
|
||||||
void SetEnabled(bool enabled);
|
void SetEnabled(bool enabled);
|
||||||
void StartDmcTransfer();
|
void StartDmcTransfer();
|
||||||
|
|
|
@ -189,7 +189,7 @@ uint32_t Disassembler::BuildCache(int32_t absoluteAddr, int32_t absoluteRamAddr,
|
||||||
|
|
||||||
void Disassembler::InvalidateCache(uint16_t memoryAddr, int32_t absoluteRamAddr)
|
void Disassembler::InvalidateCache(uint16_t memoryAddr, int32_t absoluteRamAddr)
|
||||||
{
|
{
|
||||||
uint32_t addr;
|
int32_t addr;
|
||||||
vector<shared_ptr<DisassemblyInfo>> *cache;
|
vector<shared_ptr<DisassemblyInfo>> *cache;
|
||||||
if(memoryAddr < 0x2000) {
|
if(memoryAddr < 0x2000) {
|
||||||
addr = memoryAddr & 0x7FF;
|
addr = memoryAddr & 0x7FF;
|
||||||
|
|
|
@ -5,10 +5,10 @@
|
||||||
class DreamTech01 : public BaseMapper
|
class DreamTech01 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x4000; }
|
uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
uint16_t RegisterStartAddress() { return 0x5020; }
|
uint16_t RegisterStartAddress() override { return 0x5020; }
|
||||||
uint16_t RegisterEndAddress() { return 0x5020; }
|
uint16_t RegisterEndAddress() override { return 0x5020; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
|
|
@ -8,10 +8,10 @@ private:
|
||||||
uint8_t _reg;
|
uint8_t _reg;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x2000; }
|
uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
uint32_t GetWorkRamSize() { return 0x8000; }
|
uint32_t GetWorkRamSize() override { return 0x8000; }
|
||||||
uint32_t GetWorkRamPageSize() { return 0x2000; }
|
uint32_t GetWorkRamPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
|
28
Core/FDS.h
28
Core/FDS.h
|
@ -71,16 +71,16 @@ private:
|
||||||
bool _fastForwarding = false;
|
bool _fastForwarding = false;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual uint32_t GetWorkRamPageSize() { return 0x8000; }
|
virtual uint32_t GetWorkRamPageSize() override { return 0x8000; }
|
||||||
virtual uint32_t GetWorkRamSize() { return 0x8000; }
|
virtual uint32_t GetWorkRamSize() override { return 0x8000; }
|
||||||
uint16_t RegisterStartAddress() { return 0x4020; }
|
uint16_t RegisterStartAddress() override { return 0x4020; }
|
||||||
uint16_t RegisterEndAddress() { return 0x4092; }
|
uint16_t RegisterEndAddress() override { return 0x4092; }
|
||||||
bool AllowRegisterRead() { return true; }
|
bool AllowRegisterRead() override { return true; }
|
||||||
|
|
||||||
void InitMapper();
|
void InitMapper() override;
|
||||||
void InitMapper(RomData &romData);
|
void InitMapper(RomData &romData) override;
|
||||||
|
|
||||||
uint32_t GetFdsDiskSideSize(uint8_t side);
|
uint32_t GetFdsDiskSideSize(uint8_t side);
|
||||||
uint8_t ReadFdsDisk();
|
uint8_t ReadFdsDisk();
|
||||||
|
@ -88,17 +88,17 @@ protected:
|
||||||
|
|
||||||
void ClockIrq();
|
void ClockIrq();
|
||||||
|
|
||||||
void ProcessCpuClock();
|
void ProcessCpuClock() override;
|
||||||
void UpdateCrc(uint8_t value);
|
void UpdateCrc(uint8_t value);
|
||||||
|
|
||||||
bool IsDiskInserted();
|
bool IsDiskInserted();
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value);
|
void WriteRegister(uint16_t addr, uint8_t value) override;
|
||||||
uint8_t ReadRegister(uint16_t addr);
|
uint8_t ReadRegister(uint16_t addr) override;
|
||||||
|
|
||||||
uint8_t ReadRAM(uint16_t addr);
|
uint8_t ReadRAM(uint16_t addr) override;
|
||||||
|
|
||||||
void StreamState(bool saving);
|
void StreamState(bool saving) override;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
FDS();
|
FDS();
|
||||||
|
|
|
@ -33,7 +33,7 @@ private:
|
||||||
uint8_t _lastOutput = 0;
|
uint8_t _lastOutput = 0;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseExpansionAudio::StreamState(saving);
|
BaseExpansionAudio::StreamState(saving);
|
||||||
|
|
||||||
|
@ -44,7 +44,7 @@ protected:
|
||||||
Stream(volume, mod, _waveWriteEnabled, _disableEnvelopes, _haltWaveform, _masterVolume, _waveOverflowCounter, _wavePitch, _wavePosition, _lastOutput, waveTable);
|
Stream(volume, mod, _waveWriteEnabled, _disableEnvelopes, _haltWaveform, _masterVolume, _waveOverflowCounter, _wavePitch, _wavePosition, _lastOutput, waveTable);
|
||||||
}
|
}
|
||||||
|
|
||||||
void ClockAudio()
|
void ClockAudio() override
|
||||||
{
|
{
|
||||||
//"The envelopes are not ticked while the waveform is halted."
|
//"The envelopes are not ticked while the waveform is halted."
|
||||||
_volume.TickEnvelope(_disableEnvelopes || _haltWaveform);
|
_volume.TickEnvelope(_disableEnvelopes || _haltWaveform);
|
||||||
|
|
|
@ -10,13 +10,13 @@ private:
|
||||||
bool _ffeAltMode;
|
bool _ffeAltMode;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x2000; }
|
uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x400; }
|
uint16_t GetCHRPageSize() override { return 0x400; }
|
||||||
uint32_t GetChrRamSize() { return 0x8000; }
|
uint32_t GetChrRamSize() override { return 0x8000; }
|
||||||
uint16_t RegisterStartAddress() { return 0x42FE; }
|
uint16_t RegisterStartAddress() override { return 0x42FE; }
|
||||||
uint16_t RegisterEndAddress() { return 0x4517; }
|
uint16_t RegisterEndAddress() override { return 0x4517; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
_irqCounter = 0;
|
_irqCounter = 0;
|
||||||
_irqEnabled = false;
|
_irqEnabled = false;
|
||||||
|
@ -40,13 +40,13 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_irqCounter, _irqEnabled, _ffeAltMode);
|
Stream(_irqCounter, _irqEnabled, _ffeAltMode);
|
||||||
}
|
}
|
||||||
|
|
||||||
void ProcessCpuClock()
|
void ProcessCpuClock() override
|
||||||
{
|
{
|
||||||
if(_irqEnabled) {
|
if(_irqEnabled) {
|
||||||
_irqCounter++;
|
_irqCounter++;
|
||||||
|
@ -57,7 +57,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr) {
|
switch(addr) {
|
||||||
case 0x42FE:
|
case 0x42FE:
|
||||||
|
|
|
@ -35,5 +35,5 @@ public:
|
||||||
|
|
||||||
static uint8_t GetControllerState(uint8_t port);
|
static uint8_t GetControllerState(uint8_t port);
|
||||||
|
|
||||||
void ProcessNotification(ConsoleNotificationType type, void* parameter);
|
void ProcessNotification(ConsoleNotificationType type, void* parameter) override;
|
||||||
};
|
};
|
|
@ -35,13 +35,13 @@ private:
|
||||||
void DisableControllers();
|
void DisableControllers();
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
void ProcessMessage(NetMessage* message);
|
void ProcessMessage(NetMessage* message) override;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
GameClientConnection(shared_ptr<Socket> socket, shared_ptr<ClientConnectionData> connectionData);
|
GameClientConnection(shared_ptr<Socket> socket, shared_ptr<ClientConnectionData> connectionData);
|
||||||
~GameClientConnection();
|
~GameClientConnection();
|
||||||
|
|
||||||
void ProcessNotification(ConsoleNotificationType type, void* parameter);
|
void ProcessNotification(ConsoleNotificationType type, void* parameter) override;
|
||||||
|
|
||||||
uint8_t GetControllerState(uint8_t port);
|
uint8_t GetControllerState(uint8_t port);
|
||||||
void SendInput();
|
void SendInput();
|
||||||
|
|
|
@ -29,7 +29,7 @@ private:
|
||||||
static uint8_t GetFirstFreeControllerPort();
|
static uint8_t GetFirstFreeControllerPort();
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
void ProcessMessage(NetMessage* message);
|
void ProcessMessage(NetMessage* message) override;
|
||||||
|
|
||||||
public:
|
public:
|
||||||
GameServerConnection(shared_ptr<Socket> socket);
|
GameServerConnection(shared_ptr<Socket> socket);
|
||||||
|
@ -41,7 +41,7 @@ public:
|
||||||
string GetPlayerName();
|
string GetPlayerName();
|
||||||
uint8_t GetControllerPort();
|
uint8_t GetControllerPort();
|
||||||
|
|
||||||
virtual void ProcessNotification(ConsoleNotificationType type, void* parameter);
|
virtual void ProcessNotification(ConsoleNotificationType type, void* parameter) override;
|
||||||
|
|
||||||
static GameServerConnection* GetNetPlayDevice(uint8_t port);
|
static GameServerConnection* GetNetPlayDevice(uint8_t port);
|
||||||
};
|
};
|
||||||
|
|
|
@ -8,20 +8,20 @@ private:
|
||||||
uint8_t _regs[2];
|
uint8_t _regs[2];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x4000; }
|
uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
_regs[0] = _regs[1] = 0;
|
_regs[0] = _regs[1] = 0;
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_regs[0], _regs[1]);
|
Stream(_regs[0], _regs[1]);
|
||||||
|
|
|
@ -5,8 +5,8 @@
|
||||||
class Gs2004 : public BaseMapper
|
class Gs2004 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x2000; }
|
uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
|
|
@ -5,8 +5,8 @@
|
||||||
class Gs2013 : public BaseMapper
|
class Gs2013 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x2000; }
|
uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
|
|
@ -5,16 +5,16 @@
|
||||||
class GxRom : public BaseMapper
|
class GxRom : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, (value >> 4) & 0x03);
|
SelectPRGPage(0, (value >> 4) & 0x03);
|
||||||
SelectCHRPage(0, value & 0x03);
|
SelectCHRPage(0, value & 0x03);
|
||||||
|
|
|
@ -254,7 +254,7 @@ public:
|
||||||
_loadLock.Release();
|
_loadLock.Release();
|
||||||
}
|
}
|
||||||
|
|
||||||
void ProcessNotification(ConsoleNotificationType type, void* parameter)
|
void ProcessNotification(ConsoleNotificationType type, void* parameter) override
|
||||||
{
|
{
|
||||||
if(type == ConsoleNotificationType::GameLoaded) {
|
if(type == ConsoleNotificationType::GameLoaded) {
|
||||||
LoadHdNesPack();
|
LoadHdNesPack();
|
||||||
|
|
|
@ -5,18 +5,18 @@
|
||||||
class Henggedianzi177 : public BaseMapper
|
class Henggedianzi177 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x8000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x8000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0xFFFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0xFFFF; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, value);
|
SelectPRGPage(0, value);
|
||||||
SetMirroringType(value & 0x20 ? MirroringType::Horizontal : MirroringType::Vertical);
|
SetMirroringType(value & 0x20 ? MirroringType::Horizontal : MirroringType::Vertical);
|
||||||
|
|
|
@ -5,19 +5,19 @@
|
||||||
class Henggedianzi179 : public BaseMapper
|
class Henggedianzi179 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x8000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x8000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0xFFFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0xFFFF; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
AddRegisterRange(0x5000, 0x5FFF, MemoryOperation::Write);
|
AddRegisterRange(0x5000, 0x5FFF, MemoryOperation::Write);
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr >= 0x8000) {
|
if(addr >= 0x8000) {
|
||||||
SetMirroringType(value & 0x01 ? MirroringType::Horizontal : MirroringType::Vertical);
|
SetMirroringType(value & 0x01 ? MirroringType::Horizontal : MirroringType::Vertical);
|
||||||
|
|
|
@ -5,13 +5,13 @@
|
||||||
class IremG101 : public BaseMapper
|
class IremG101 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x0400; }
|
virtual uint16_t GetCHRPageSize() override { return 0x0400; }
|
||||||
|
|
||||||
uint8_t _prgRegs[2];
|
uint8_t _prgRegs[2];
|
||||||
uint8_t _prgMode;
|
uint8_t _prgMode;
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
_prgRegs[0] = _prgRegs[1] = 0;
|
_prgRegs[0] = _prgRegs[1] = 0;
|
||||||
_prgMode = 0;
|
_prgMode = 0;
|
||||||
|
@ -26,7 +26,7 @@ class IremG101 : public BaseMapper
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
|
|
||||||
|
@ -48,7 +48,7 @@ class IremG101 : public BaseMapper
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr & 0xF000) {
|
switch(addr & 0xF000) {
|
||||||
case 0x8000:
|
case 0x8000:
|
||||||
|
|
|
@ -11,10 +11,10 @@ private:
|
||||||
uint16_t _irqReloadValue = 0;
|
uint16_t _irqReloadValue = 0;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x400; }
|
virtual uint16_t GetCHRPageSize() override { return 0x400; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectPRGPage(1, 1);
|
SelectPRGPage(1, 1);
|
||||||
|
@ -22,13 +22,13 @@ protected:
|
||||||
SelectPRGPage(3, -1);
|
SelectPRGPage(3, -1);
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_irqEnabled, _irqCounter, _irqReloadValue);
|
Stream(_irqEnabled, _irqCounter, _irqReloadValue);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void ProcessCpuClock()
|
virtual void ProcessCpuClock() override
|
||||||
{
|
{
|
||||||
if(_irqEnabled) {
|
if(_irqEnabled) {
|
||||||
_irqCounter--;
|
_irqCounter--;
|
||||||
|
@ -39,7 +39,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr) {
|
switch(addr) {
|
||||||
case 0x8000: SelectPRGPage(0, value); break;
|
case 0x8000: SelectPRGPage(0, value); break;
|
||||||
|
|
|
@ -5,13 +5,13 @@
|
||||||
class IremLrog017 : public BaseMapper
|
class IremLrog017 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x0800; }
|
virtual uint16_t GetCHRPageSize() override { return 0x0800; }
|
||||||
virtual uint32_t GetChrRamSize() { return 0x1800; }
|
virtual uint32_t GetChrRamSize() override { return 0x1800; }
|
||||||
virtual uint16_t GetChrRamPageSize() { return 0x0800; }
|
virtual uint16_t GetChrRamPageSize() override { return 0x0800; }
|
||||||
virtual bool HasBusConflicts() { return true; }
|
virtual bool HasBusConflicts() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
|
@ -22,7 +22,7 @@ protected:
|
||||||
SelectCHRPage(3, 2, ChrMemoryType::ChrRam);
|
SelectCHRPage(3, 2, ChrMemoryType::ChrRam);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, value & 0x0F);
|
SelectPRGPage(0, value & 0x0F);
|
||||||
SelectCHRPage(0, (value >> 4) & 0x0F);
|
SelectCHRPage(0, (value >> 4) & 0x0F);
|
||||||
|
|
|
@ -5,10 +5,10 @@
|
||||||
class IremTamS1 : public BaseMapper
|
class IremTamS1 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, -1);
|
SelectPRGPage(0, -1);
|
||||||
SelectPRGPage(1, -1);
|
SelectPRGPage(1, -1);
|
||||||
|
@ -16,7 +16,7 @@ protected:
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
SelectPRGPage(1, value & 0x0F);
|
SelectPRGPage(1, value & 0x0F);
|
||||||
switch(value >> 6) {
|
switch(value >> 6) {
|
||||||
|
|
|
@ -5,19 +5,19 @@
|
||||||
class JalecoJf11_14 : public BaseMapper
|
class JalecoJf11_14 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x6000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x6000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0x7FFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0x7FFF; }
|
||||||
|
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, (value >> 4) & 0x03);
|
SelectPRGPage(0, (value >> 4) & 0x03);
|
||||||
SelectCHRPage(0, value & 0x0F);
|
SelectCHRPage(0, value & 0x0F);
|
||||||
|
|
|
@ -5,17 +5,17 @@
|
||||||
class JalecoJf13 : public BaseMapper
|
class JalecoJf13 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x6000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x6000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0x7FFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0x7FFF; }
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr & 0x7000) {
|
switch(addr & 0x7000) {
|
||||||
case 0x6000:
|
case 0x6000:
|
||||||
|
|
|
@ -5,11 +5,11 @@
|
||||||
class JalecoJf16 : public BaseMapper
|
class JalecoJf16 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual bool HasBusConflicts() { return true; }
|
virtual bool HasBusConflicts() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectPRGPage(1, -1);
|
SelectPRGPage(1, -1);
|
||||||
|
@ -17,7 +17,7 @@ protected:
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, value & 0x07);
|
SelectPRGPage(0, value & 0x07);
|
||||||
SelectCHRPage(0, (value >> 4) & 0x0F);
|
SelectCHRPage(0, (value >> 4) & 0x0F);
|
||||||
|
|
|
@ -11,11 +11,11 @@ private:
|
||||||
bool _chrFlag = false;
|
bool _chrFlag = false;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual bool HasBusConflicts() { return true; }
|
virtual bool HasBusConflicts() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectPRGPage(1, -1);
|
SelectPRGPage(1, -1);
|
||||||
|
@ -23,13 +23,13 @@ protected:
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_prgFlag, _chrFlag);
|
Stream(_prgFlag, _chrFlag);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(!_prgFlag && (value & 0x80)) {
|
if(!_prgFlag && (value & 0x80)) {
|
||||||
if(_jf19Mode) {
|
if(_jf19Mode) {
|
||||||
|
|
|
@ -8,18 +8,18 @@ private:
|
||||||
bool _orderedBits;
|
bool _orderedBits;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x6000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x6000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0x7FFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0x7FFF; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
SelectCHRPage(0, 0);
|
SelectCHRPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(_orderedBits) {
|
if(_orderedBits) {
|
||||||
//Mapper 101
|
//Mapper 101
|
||||||
|
|
|
@ -6,8 +6,8 @@
|
||||||
class JalecoSs88006 : public BaseMapper
|
class JalecoSs88006 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x0400; }
|
virtual uint16_t GetCHRPageSize() override { return 0x0400; }
|
||||||
|
|
||||||
const vector<uint16_t> _irqMask = { { 0xFFFF, 0x0FFF, 0x00FF, 0x000F } };
|
const vector<uint16_t> _irqMask = { { 0xFFFF, 0x0FFF, 0x00FF, 0x000F } };
|
||||||
|
|
||||||
|
@ -18,7 +18,7 @@ class JalecoSs88006 : public BaseMapper
|
||||||
uint8_t _irqCounterSize;
|
uint8_t _irqCounterSize;
|
||||||
bool _irqEnabled;
|
bool _irqEnabled;
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
memset(_prgBanks, 0, 3);
|
memset(_prgBanks, 0, 3);
|
||||||
memset(_chrBanks, 0, 8);
|
memset(_chrBanks, 0, 8);
|
||||||
|
@ -30,7 +30,7 @@ class JalecoSs88006 : public BaseMapper
|
||||||
SelectPRGPage(3, -1);
|
SelectPRGPage(3, -1);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
|
|
||||||
|
@ -72,7 +72,7 @@ class JalecoSs88006 : public BaseMapper
|
||||||
SelectCHRPage(bankNumber, _chrBanks[bankNumber]);
|
SelectCHRPage(bankNumber, _chrBanks[bankNumber]);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void ProcessCpuClock()
|
virtual void ProcessCpuClock() override
|
||||||
{
|
{
|
||||||
//Clock irq counter every memory read/write (each cpu cycle either reads or writes memory)
|
//Clock irq counter every memory read/write (each cpu cycle either reads or writes memory)
|
||||||
ClockIrqCounter();
|
ClockIrqCounter();
|
||||||
|
@ -96,7 +96,7 @@ class JalecoSs88006 : public BaseMapper
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
bool updateUpperBits = (addr & 0x01) == 0x01;
|
bool updateUpperBits = (addr & 0x01) == 0x01;
|
||||||
value &= 0x0F;
|
value &= 0x0F;
|
||||||
|
|
|
@ -52,11 +52,11 @@ private:
|
||||||
uint16_t _lastPpuAddr;
|
uint16_t _lastPpuAddr;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x0400; }
|
virtual uint16_t GetCHRPageSize() override { return 0x0400; }
|
||||||
virtual bool AllowRegisterRead() { return true; }
|
virtual bool AllowRegisterRead() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
||||||
AddRegisterRange(0x5000, 0x5FFF, MemoryOperation::Any);
|
AddRegisterRange(0x5000, 0x5FFF, MemoryOperation::Any);
|
||||||
|
@ -102,7 +102,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
|
|
||||||
|
@ -241,7 +241,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t ReadRegister(uint16_t addr)
|
uint8_t ReadRegister(uint16_t addr) override
|
||||||
{
|
{
|
||||||
switch(addr & 0xF803) {
|
switch(addr & 0xF803) {
|
||||||
case 0x5000: return 0; //Dip switches
|
case 0x5000: return 0; //Dip switches
|
||||||
|
@ -253,7 +253,7 @@ protected:
|
||||||
return MemoryManager::GetOpenBus();
|
return MemoryManager::GetOpenBus();
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr < 0x8000) {
|
if(addr < 0x8000) {
|
||||||
switch(addr & 0xF803) {
|
switch(addr & 0xF803) {
|
||||||
|
@ -336,14 +336,14 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void ProcessCpuClock()
|
void ProcessCpuClock() override
|
||||||
{
|
{
|
||||||
if(_irqSource == JyIrqSource::CpuClock || (_irqSource == JyIrqSource::CpuWrite && CPU::IsCpuWrite())) {
|
if(_irqSource == JyIrqSource::CpuClock || (_irqSource == JyIrqSource::CpuWrite && CPU::IsCpuWrite())) {
|
||||||
TickIrqCounter();
|
TickIrqCounter();
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t ReadVRAM(uint16_t addr, MemoryOperationType type)
|
uint8_t ReadVRAM(uint16_t addr, MemoryOperationType type) override
|
||||||
{
|
{
|
||||||
if(_irqSource == JyIrqSource::PpuRead && type == MemoryOperationType::PpuRenderingRead) {
|
if(_irqSource == JyIrqSource::PpuRead && type == MemoryOperationType::PpuRenderingRead) {
|
||||||
TickIrqCounter();
|
TickIrqCounter();
|
||||||
|
@ -351,7 +351,7 @@ protected:
|
||||||
return BaseMapper::ReadVRAM(addr, type);
|
return BaseMapper::ReadVRAM(addr, type);
|
||||||
}
|
}
|
||||||
|
|
||||||
void NotifyVRAMAddressChange(uint16_t addr)
|
void NotifyVRAMAddressChange(uint16_t addr) override
|
||||||
{
|
{
|
||||||
if(_irqSource == JyIrqSource::PpuA12Rise && (addr & 0x1000) && !(_lastPpuAddr & 0x1000)) {
|
if(_irqSource == JyIrqSource::PpuA12Rise && (addr & 0x1000) && !(_lastPpuAddr & 0x1000)) {
|
||||||
TickIrqCounter();
|
TickIrqCounter();
|
||||||
|
|
|
@ -11,10 +11,10 @@ class Kaiser202 : public BaseMapper
|
||||||
uint8_t _prgRegs[4];
|
uint8_t _prgRegs[4];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x0400; }
|
virtual uint16_t GetCHRPageSize() override { return 0x0400; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
_irqReloadValue = 0;
|
_irqReloadValue = 0;
|
||||||
_irqCounter = 0;
|
_irqCounter = 0;
|
||||||
|
@ -25,7 +25,7 @@ protected:
|
||||||
SelectPRGPage(3, -1);
|
SelectPRGPage(3, -1);
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_irqReloadValue, _irqCounter, _irqEnabled, _selectedReg, _prgRegs[0], _prgRegs[1], _prgRegs[2], _prgRegs[3]);
|
Stream(_irqReloadValue, _irqCounter, _irqEnabled, _selectedReg, _prgRegs[0], _prgRegs[1], _prgRegs[2], _prgRegs[3]);
|
||||||
|
@ -35,7 +35,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void ProcessCpuClock()
|
void ProcessCpuClock() override
|
||||||
{
|
{
|
||||||
if(_irqEnabled) {
|
if(_irqEnabled) {
|
||||||
_irqCounter++;
|
_irqCounter++;
|
||||||
|
@ -46,7 +46,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr & 0xF000) {
|
switch(addr & 0xF000) {
|
||||||
case 0x8000: _irqReloadValue = (_irqReloadValue & 0xFFF0) | (value & 0x0F); break;
|
case 0x8000: _irqReloadValue = (_irqReloadValue & 0xFFF0) | (value & 0x0F); break;
|
||||||
|
|
|
@ -7,8 +7,8 @@ class Kaiser7016 : public BaseMapper
|
||||||
uint8_t _prgReg;
|
uint8_t _prgReg;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x2000; }
|
uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
@ -23,7 +23,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_prgReg);
|
Stream(_prgReg);
|
||||||
|
|
|
@ -8,13 +8,13 @@ private:
|
||||||
uint8_t _reg;
|
uint8_t _reg;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x2000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x8000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x8000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0xFFFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0xFFFF; }
|
||||||
virtual bool AllowRegisterRead() { return true; }
|
virtual bool AllowRegisterRead() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
_reg = 0;
|
_reg = 0;
|
||||||
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
||||||
|
@ -22,19 +22,19 @@ protected:
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset(bool softReset)
|
void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
_reg = 0;
|
_reg = 0;
|
||||||
ReadRegister(0xFFFC);
|
ReadRegister(0xFFFC);
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_reg);
|
Stream(_reg);
|
||||||
}
|
}
|
||||||
|
|
||||||
uint8_t ReadRegister(uint16_t addr)
|
uint8_t ReadRegister(uint16_t addr) override
|
||||||
{
|
{
|
||||||
SelectCHRPage(0, _reg);
|
SelectCHRPage(0, _reg);
|
||||||
SelectPRGPage(0, _reg);
|
SelectPRGPage(0, _reg);
|
||||||
|
@ -43,7 +43,7 @@ protected:
|
||||||
return InternalReadRam(addr);
|
return InternalReadRam(addr);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr) {
|
switch(addr) {
|
||||||
case 0x8000: SetMirroringType(value & 0x04 ? MirroringType::Horizontal : MirroringType::Vertical); break;
|
case 0x8000: SetMirroringType(value & 0x04 ? MirroringType::Horizontal : MirroringType::Vertical); break;
|
||||||
|
|
|
@ -9,9 +9,9 @@ private:
|
||||||
uint8_t _regs[8];
|
uint8_t _regs[8];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint32_t GetWorkRamPageSize() { return 0x1000; }
|
uint32_t GetWorkRamPageSize() override { return 0x1000; }
|
||||||
uint16_t GetPRGPageSize() { return 0x1000; }
|
uint16_t GetPRGPageSize() override { return 0x1000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
@ -24,7 +24,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
ArrayInfo<uint8_t> regs{ _regs, 8 };
|
ArrayInfo<uint8_t> regs{ _regs, 8 };
|
||||||
|
|
|
@ -8,8 +8,8 @@ private:
|
||||||
uint8_t _regs[8];
|
uint8_t _regs[8];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x800; }
|
uint16_t GetPRGPageSize() override { return 0x800; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
@ -18,7 +18,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
ArrayInfo<uint8_t> regs{ _regs, 8 };
|
ArrayInfo<uint8_t> regs{ _regs, 8 };
|
||||||
|
|
|
@ -5,17 +5,17 @@
|
||||||
class Kaiser7058 : public BaseMapper
|
class Kaiser7058 : public BaseMapper
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x8000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x8000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x1000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x1000; }
|
||||||
virtual uint16_t RegisterStartAddress() { return 0xF000; }
|
virtual uint16_t RegisterStartAddress() override { return 0xF000; }
|
||||||
virtual uint16_t RegisterEndAddress() { return 0xFFFF; }
|
virtual uint16_t RegisterEndAddress() override { return 0xFFFF; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
SelectPRGPage(0, 0);
|
SelectPRGPage(0, 0);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr & 0xF080) {
|
switch(addr & 0xF080) {
|
||||||
case 0xF000: SelectCHRPage(0, value); break;
|
case 0xF000: SelectCHRPage(0, value); break;
|
||||||
|
|
|
@ -68,7 +68,7 @@ int32_t LabelManager::GetLabelAddress(uint16_t relativeAddr, bool checkRegisters
|
||||||
|
|
||||||
string LabelManager::GetLabel(uint16_t relativeAddr, bool checkRegisters)
|
string LabelManager::GetLabel(uint16_t relativeAddr, bool checkRegisters)
|
||||||
{
|
{
|
||||||
uint32_t labelAddr = GetLabelAddress(relativeAddr, checkRegisters);
|
int32_t labelAddr = GetLabelAddress(relativeAddr, checkRegisters);
|
||||||
|
|
||||||
if(labelAddr >= 0) {
|
if(labelAddr >= 0) {
|
||||||
auto result = _codeLabels.find(labelAddr);
|
auto result = _codeLabels.find(labelAddr);
|
||||||
|
@ -82,7 +82,7 @@ string LabelManager::GetLabel(uint16_t relativeAddr, bool checkRegisters)
|
||||||
|
|
||||||
string LabelManager::GetComment(uint16_t relativeAddr)
|
string LabelManager::GetComment(uint16_t relativeAddr)
|
||||||
{
|
{
|
||||||
uint32_t labelAddr = GetLabelAddress(relativeAddr, false);
|
int32_t labelAddr = GetLabelAddress(relativeAddr, false);
|
||||||
|
|
||||||
if(labelAddr >= 0) {
|
if(labelAddr >= 0) {
|
||||||
auto result = _codeComments.find(labelAddr);
|
auto result = _codeComments.find(labelAddr);
|
||||||
|
|
|
@ -9,8 +9,8 @@ private:
|
||||||
uint8_t _regs[8];
|
uint8_t _regs[8];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x2000; }
|
uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
@ -23,7 +23,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
ArrayInfo<uint8_t> regs{ _regs, 8 };
|
ArrayInfo<uint8_t> regs{ _regs, 8 };
|
||||||
|
|
10
Core/Lh32.h
10
Core/Lh32.h
|
@ -8,10 +8,10 @@ private:
|
||||||
uint8_t _prgReg;
|
uint8_t _prgReg;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
uint16_t GetPRGPageSize() { return 0x2000; }
|
uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
uint16_t GetCHRPageSize() { return 0x2000; }
|
uint16_t GetCHRPageSize() override { return 0x2000; }
|
||||||
uint16_t RegisterStartAddress() { return 0x6000; }
|
uint16_t RegisterStartAddress() override { return 0x6000; }
|
||||||
uint16_t RegisterEndAddress() { return 0x6000; }
|
uint16_t RegisterEndAddress() override { return 0x6000; }
|
||||||
|
|
||||||
void InitMapper() override
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
|
@ -26,7 +26,7 @@ protected:
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_prgReg);
|
Stream(_prgReg);
|
||||||
|
|
10
Core/MMC1.h
10
Core/MMC1.h
|
@ -165,7 +165,7 @@ class MMC1 : public BaseMapper
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_state.Reg8000, _state.RegA000, _state.RegC000, _state.RegE000, _writeBuffer, _shiftCount, _lastWriteCycle, _lastChrReg);
|
Stream(_state.Reg8000, _state.RegA000, _state.RegC000, _state.RegE000, _writeBuffer, _shiftCount, _lastWriteCycle, _lastChrReg);
|
||||||
|
@ -174,10 +174,10 @@ class MMC1 : public BaseMapper
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x4000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x4000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x1000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x1000; }
|
||||||
|
|
||||||
virtual void InitMapper()
|
virtual void InitMapper() override
|
||||||
{
|
{
|
||||||
_state.Reg8000 = 0x0C; //On powerup: bits 2,3 of $8000 are set (this ensures the $8000 is bank 0, and $C000 is the last bank - needed for SEROM/SHROM/SH1ROM which do no support banking)
|
_state.Reg8000 = 0x0C; //On powerup: bits 2,3 of $8000 are set (this ensures the $8000 is bank 0, and $C000 is the last bank - needed for SEROM/SHROM/SH1ROM which do no support banking)
|
||||||
_state.RegA000 = 0x00;
|
_state.RegA000 = 0x00;
|
||||||
|
@ -192,7 +192,7 @@ class MMC1 : public BaseMapper
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void WriteRegister(uint16_t addr, uint8_t value)
|
virtual void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
int32_t currentCycle = CPU::GetCycleCount();
|
int32_t currentCycle = CPU::GetCycleCount();
|
||||||
|
|
||||||
|
|
|
@ -9,7 +9,7 @@ private:
|
||||||
bool _irqEnabled;
|
bool _irqEnabled;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
MMC1::InitMapper();
|
MMC1::InitMapper();
|
||||||
_initState = 0;
|
_initState = 0;
|
||||||
|
@ -18,13 +18,13 @@ protected:
|
||||||
_state.RegA000 |= 0x10; //Set I bit to 1
|
_state.RegA000 |= 0x10; //Set I bit to 1
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC1::StreamState(saving);
|
MMC1::StreamState(saving);
|
||||||
Stream(_initState, _irqCounter, _irqEnabled);
|
Stream(_initState, _irqCounter, _irqEnabled);
|
||||||
}
|
}
|
||||||
|
|
||||||
void ProcessCpuClock()
|
void ProcessCpuClock() override
|
||||||
{
|
{
|
||||||
if(_irqEnabled) {
|
if(_irqEnabled) {
|
||||||
_irqCounter++;
|
_irqCounter++;
|
||||||
|
@ -36,7 +36,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void UpdateState()
|
void UpdateState() override
|
||||||
{
|
{
|
||||||
if(_initState == 0 && (_state.RegA000 & 0x10) == 0x00) {
|
if(_initState == 0 && (_state.RegA000 & 0x10) == 0x00) {
|
||||||
_initState = 1;
|
_initState = 1;
|
||||||
|
|
12
Core/MMC2.h
12
Core/MMC2.h
|
@ -22,10 +22,10 @@ class MMC2 : public BaseMapper
|
||||||
uint8_t _rightChrPage[2];
|
uint8_t _rightChrPage[2];
|
||||||
bool _needChrUpdate;
|
bool _needChrUpdate;
|
||||||
|
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x1000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x1000; }
|
||||||
|
|
||||||
virtual void InitMapper()
|
virtual void InitMapper() override
|
||||||
{
|
{
|
||||||
_leftLatch = 1;
|
_leftLatch = 1;
|
||||||
_rightLatch = 1;
|
_rightLatch = 1;
|
||||||
|
@ -43,13 +43,13 @@ class MMC2 : public BaseMapper
|
||||||
SelectCHRPage(0, 1);
|
SelectCHRPage(0, 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
void StreamState(bool saving)
|
void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
Stream(_leftLatch, _rightLatch, _needChrUpdate, _leftChrPage[0], _leftChrPage[1], _rightChrPage[0], _rightChrPage[1]);
|
Stream(_leftLatch, _rightLatch, _needChrUpdate, _leftChrPage[0], _leftChrPage[1], _rightChrPage[0], _rightChrPage[1]);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch((MMC2Registers)(addr >> 12)) {
|
switch((MMC2Registers)(addr >> 12)) {
|
||||||
case MMC2Registers::RegA000:
|
case MMC2Registers::RegA000:
|
||||||
|
@ -83,7 +83,7 @@ class MMC2 : public BaseMapper
|
||||||
}
|
}
|
||||||
|
|
||||||
public:
|
public:
|
||||||
virtual void NotifyVRAMAddressChange(uint16_t addr)
|
virtual void NotifyVRAMAddressChange(uint16_t addr) override
|
||||||
{
|
{
|
||||||
if(_needChrUpdate) {
|
if(_needChrUpdate) {
|
||||||
SelectCHRPage(0, _leftChrPage[_leftLatch]);
|
SelectCHRPage(0, _leftChrPage[_leftLatch]);
|
||||||
|
|
22
Core/MMC3.h
22
Core/MMC3.h
|
@ -66,7 +66,7 @@ class MMC3 : public BaseMapper
|
||||||
return _chrMode;
|
return _chrMode;
|
||||||
}
|
}
|
||||||
|
|
||||||
void Reset()
|
void ResetMmc3()
|
||||||
{
|
{
|
||||||
_state.Reg8000 = 0;
|
_state.Reg8000 = 0;
|
||||||
_state.RegA000 = 0;
|
_state.RegA000 = 0;
|
||||||
|
@ -148,7 +148,7 @@ class MMC3 : public BaseMapper
|
||||||
_prgMode = (_state.Reg8000 & 0x40) >> 6;
|
_prgMode = (_state.Reg8000 & 0x40) >> 6;
|
||||||
|
|
||||||
if(_subMapperID == 1) {
|
if(_subMapperID == 1) {
|
||||||
bool wramEnabled = (_state.Reg8000 & 0x20) == 0x20;
|
//bool wramEnabled = (_state.Reg8000 & 0x20) == 0x20;
|
||||||
RemoveCpuMemoryMapping(0x6000, 0x7000);
|
RemoveCpuMemoryMapping(0x6000, 0x7000);
|
||||||
|
|
||||||
uint8_t firstBankAccess = (_state.RegA001 & 0x10 ? MemoryAccessType::Write : 0) | (_state.RegA001 & 0x20 ? MemoryAccessType::Read : 0);
|
uint8_t firstBankAccess = (_state.RegA001 & 0x10 ? MemoryAccessType::Write : 0) | (_state.RegA001 & 0x20 ? MemoryAccessType::Read : 0);
|
||||||
|
@ -175,7 +175,7 @@ class MMC3 : public BaseMapper
|
||||||
UpdateChrMapping();
|
UpdateChrMapping();
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
BaseMapper::StreamState(saving);
|
BaseMapper::StreamState(saving);
|
||||||
ArrayInfo<uint8_t> registers = { _registers, 8 };
|
ArrayInfo<uint8_t> registers = { _registers, 8 };
|
||||||
|
@ -190,24 +190,24 @@ class MMC3 : public BaseMapper
|
||||||
UpdateState();
|
UpdateState();
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual uint16_t GetPRGPageSize() { return 0x2000; }
|
virtual uint16_t GetPRGPageSize() override { return 0x2000; }
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x0400; }
|
virtual uint16_t GetCHRPageSize() override { return 0x0400; }
|
||||||
virtual uint32_t GetSaveRamPageSize() { return _subMapperID == 1 ? 0x200 : 0x2000; }
|
virtual uint32_t GetSaveRamPageSize() override { return _subMapperID == 1 ? 0x200 : 0x2000; }
|
||||||
virtual uint32_t GetSaveRamSize() { return _subMapperID == 1 ? 0x400 : 0x2000; }
|
virtual uint32_t GetSaveRamSize() override { return _subMapperID == 1 ? 0x400 : 0x2000; }
|
||||||
|
|
||||||
virtual void InitMapper()
|
virtual void InitMapper() override
|
||||||
{
|
{
|
||||||
//Force MMC3A irqs for boards that are known to use the A revision.
|
//Force MMC3A irqs for boards that are known to use the A revision.
|
||||||
//Some MMC3B boards also have the A behavior, but currently no way to tell them apart.
|
//Some MMC3B boards also have the A behavior, but currently no way to tell them apart.
|
||||||
_forceMmc3RevAIrqs = _databaseInfo.Chip.substr(0, 5).compare("MMC3A") == 0;
|
_forceMmc3RevAIrqs = _databaseInfo.Chip.substr(0, 5).compare("MMC3A") == 0;
|
||||||
|
|
||||||
Reset();
|
ResetMmc3();
|
||||||
SetCpuMemoryMapping(0x6000, 0x7FFF, 0, HasBattery() ? PrgMemoryType::SaveRam : PrgMemoryType::WorkRam);
|
SetCpuMemoryMapping(0x6000, 0x7FFF, 0, HasBattery() ? PrgMemoryType::SaveRam : PrgMemoryType::WorkRam);
|
||||||
UpdateState();
|
UpdateState();
|
||||||
UpdateMirroring();
|
UpdateMirroring();
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void WriteRegister(uint16_t addr, uint8_t value)
|
virtual void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch((MMC3Registers)(addr & 0xE001)) {
|
switch((MMC3Registers)(addr & 0xE001)) {
|
||||||
case MMC3Registers::Reg8000:
|
case MMC3Registers::Reg8000:
|
||||||
|
@ -271,7 +271,7 @@ class MMC3 : public BaseMapper
|
||||||
|
|
||||||
|
|
||||||
public:
|
public:
|
||||||
virtual void NotifyVRAMAddressChange(uint16_t addr)
|
virtual void NotifyVRAMAddressChange(uint16_t addr) override
|
||||||
{
|
{
|
||||||
switch(_a12Watcher.UpdateVramAddress(addr)) {
|
switch(_a12Watcher.UpdateVramAddress(addr)) {
|
||||||
case A12StateChange::Fall:
|
case A12StateChange::Fall:
|
||||||
|
|
|
@ -10,22 +10,22 @@ private:
|
||||||
uint8_t _exRegs[2];
|
uint8_t _exRegs[2];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x5000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x5000; }
|
||||||
virtual bool ForceMmc3RevAIrqs() { return true; }
|
virtual bool ForceMmc3RevAIrqs() override { return true; }
|
||||||
|
|
||||||
void InitMapper()
|
void InitMapper() override
|
||||||
{
|
{
|
||||||
MMC3::InitMapper();
|
MMC3::InitMapper();
|
||||||
_exRegs[0] = _exRegs[1] = 0;
|
_exRegs[0] = _exRegs[1] = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC3::StreamState(saving);
|
MMC3::StreamState(saving);
|
||||||
Stream(_exRegs[0], _exRegs[1]);
|
Stream(_exRegs[0], _exRegs[1]);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void UpdatePrgMapping()
|
virtual void UpdatePrgMapping() override
|
||||||
{
|
{
|
||||||
if(_exRegs[0] & 0x80) {
|
if(_exRegs[0] & 0x80) {
|
||||||
SelectPrgPage2x(0, _exRegs[0] & 0x1F);
|
SelectPrgPage2x(0, _exRegs[0] & 0x1F);
|
||||||
|
@ -35,12 +35,12 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void UpdateMirroring()
|
virtual void UpdateMirroring() override
|
||||||
{
|
{
|
||||||
//See $8000 writes below
|
//See $8000 writes below
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void WriteRegister(uint16_t addr, uint8_t value)
|
virtual void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr & 0xE000) {
|
switch(addr & 0xE000) {
|
||||||
case 0x4000: case 0x6000:
|
case 0x4000: case 0x6000:
|
||||||
|
|
|
@ -10,15 +10,15 @@ private:
|
||||||
uint8_t _chrReg = 0;
|
uint8_t _chrReg = 0;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x6000; }
|
virtual uint16_t RegisterStartAddress() override { return 0x6000; }
|
||||||
|
|
||||||
virtual void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default)
|
virtual void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default) override
|
||||||
{
|
{
|
||||||
page |= (_chrReg << 8);
|
page |= (_chrReg << 8);
|
||||||
BaseMapper::SelectCHRPage(slot, page);
|
BaseMapper::SelectCHRPage(slot, page);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void UpdateState()
|
virtual void UpdateState() override
|
||||||
{
|
{
|
||||||
MMC3::UpdateState();
|
MMC3::UpdateState();
|
||||||
|
|
||||||
|
@ -28,7 +28,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void WriteRegister(uint16_t addr, uint8_t value)
|
virtual void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr < 0x8000) {
|
if(addr < 0x8000) {
|
||||||
if(addr & 0x01) {
|
if(addr & 0x01) {
|
||||||
|
@ -42,7 +42,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC3::StreamState(saving);
|
MMC3::StreamState(saving);
|
||||||
Stream(_prgReg, _chrReg);
|
Stream(_prgReg, _chrReg);
|
||||||
|
|
|
@ -8,21 +8,21 @@ private:
|
||||||
uint8_t _chrSelection = 0;
|
uint8_t _chrSelection = 0;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual bool ForceMmc3RevAIrqs() { return true; }
|
virtual bool ForceMmc3RevAIrqs() override { return true; }
|
||||||
|
|
||||||
virtual void InitMapper()
|
virtual void InitMapper() override
|
||||||
{
|
{
|
||||||
AddRegisterRange(0x4020, 0x5FFF);
|
AddRegisterRange(0x4020, 0x5FFF);
|
||||||
MMC3::InitMapper();
|
MMC3::InitMapper();
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC3::StreamState(saving);
|
MMC3::StreamState(saving);
|
||||||
Stream(_chrSelection);
|
Stream(_chrSelection);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default)
|
virtual void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default) override
|
||||||
{
|
{
|
||||||
if(slot < 4 && (_chrSelection & 0x01)) {
|
if(slot < 4 && (_chrSelection & 0x01)) {
|
||||||
//0x0000 to 0x0FFF
|
//0x0000 to 0x0FFF
|
||||||
|
@ -35,7 +35,7 @@ protected:
|
||||||
MMC3::SelectCHRPage(slot, page, memoryType);
|
MMC3::SelectCHRPage(slot, page, memoryType);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr <= 0x5FFF) {
|
if(addr <= 0x5FFF) {
|
||||||
_chrSelection = value;
|
_chrSelection = value;
|
||||||
|
|
|
@ -9,9 +9,9 @@ private:
|
||||||
uint8_t _exRegs[8];
|
uint8_t _exRegs[8];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual bool AllowRegisterRead() { return true; }
|
virtual bool AllowRegisterRead() override { return true; }
|
||||||
|
|
||||||
virtual void InitMapper()
|
virtual void InitMapper() override
|
||||||
{
|
{
|
||||||
MMC3::InitMapper();
|
MMC3::InitMapper();
|
||||||
|
|
||||||
|
@ -19,18 +19,18 @@ protected:
|
||||||
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void Reset(bool softReset)
|
virtual void Reset(bool softReset) override
|
||||||
{
|
{
|
||||||
memset(_exRegs, 0, sizeof(_exRegs));
|
memset(_exRegs, 0, sizeof(_exRegs));
|
||||||
_exRegs[3] = 0x80;
|
_exRegs[3] = 0x80;
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual uint8_t ReadRegister(uint16_t addr)
|
virtual uint8_t ReadRegister(uint16_t addr) override
|
||||||
{
|
{
|
||||||
return _exRegs[4];
|
return _exRegs[4];
|
||||||
}
|
}
|
||||||
|
|
||||||
void SelectPRGPage(uint16_t slot, uint16_t page, PrgMemoryType memoryType)
|
void SelectPRGPage(uint16_t slot, uint16_t page, PrgMemoryType memoryType = PrgMemoryType::PrgRom) override
|
||||||
{
|
{
|
||||||
uint8_t orValue = (_exRegs[3] & 0x80) >> 2;
|
uint8_t orValue = (_exRegs[3] & 0x80) >> 2;
|
||||||
if(_exRegs[5] & 0x3F) {
|
if(_exRegs[5] & 0x3F) {
|
||||||
|
@ -43,7 +43,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType)
|
void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType) override
|
||||||
{
|
{
|
||||||
if(_prgSize == _chrRomSize) {
|
if(_prgSize == _chrRomSize) {
|
||||||
//Hack for Super 3-in-1
|
//Hack for Super 3-in-1
|
||||||
|
@ -78,7 +78,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void WriteRegister(uint16_t addr, uint8_t value)
|
virtual void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr < 0x8000) {
|
if(addr < 0x8000) {
|
||||||
//$5000-$5FFF
|
//$5000-$5FFF
|
||||||
|
@ -109,7 +109,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC3::StreamState(saving);
|
MMC3::StreamState(saving);
|
||||||
ArrayInfo<uint8_t> exRegs{ _exRegs, 8 };
|
ArrayInfo<uint8_t> exRegs{ _exRegs, 8 };
|
||||||
|
|
|
@ -7,7 +7,7 @@ class MMC3_126 : public MMC3
|
||||||
private:
|
private:
|
||||||
uint8_t _exRegs[4];
|
uint8_t _exRegs[4];
|
||||||
|
|
||||||
void SelectPRGPage(uint16_t slot, uint16_t page, PrgMemoryType memoryType) override
|
void SelectPRGPage(uint16_t slot, uint16_t page, PrgMemoryType memoryType = PrgMemoryType::PrgRom) override
|
||||||
{
|
{
|
||||||
uint16_t reg = _exRegs[0];
|
uint16_t reg = _exRegs[0];
|
||||||
page &= ((~reg >> 2) & 0x10) | 0x0F;
|
page &= ((~reg >> 2) & 0x10) | 0x0F;
|
||||||
|
|
|
@ -11,7 +11,7 @@ private:
|
||||||
uint8_t _mode;
|
uint8_t _mode;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual void InitMapper()
|
virtual void InitMapper() override
|
||||||
{
|
{
|
||||||
_mode = 0;
|
_mode = 0;
|
||||||
_vrcMirroring = 0;
|
_vrcMirroring = 0;
|
||||||
|
@ -21,7 +21,7 @@ protected:
|
||||||
MMC3::InitMapper();
|
MMC3::InitMapper();
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC3::StreamState(saving);
|
MMC3::StreamState(saving);
|
||||||
ArrayInfo<uint8_t> prgRegs{ _vrcPrgRegs, 2 };
|
ArrayInfo<uint8_t> prgRegs{ _vrcPrgRegs, 2 };
|
||||||
|
@ -29,7 +29,7 @@ protected:
|
||||||
Stream(_mode, _vrcMirroring, prgRegs, chrRegs);
|
Stream(_mode, _vrcMirroring, prgRegs, chrRegs);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default)
|
virtual void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default) override
|
||||||
{
|
{
|
||||||
if(_mode & 0x02) {
|
if(_mode & 0x02) {
|
||||||
if(slot <= 3) {
|
if(slot <= 3) {
|
||||||
|
@ -59,7 +59,7 @@ protected:
|
||||||
SetMirroringType(_vrcMirroring & 0x01 ? MirroringType::Horizontal : MirroringType::Vertical);
|
SetMirroringType(_vrcMirroring & 0x01 ? MirroringType::Horizontal : MirroringType::Vertical);
|
||||||
}
|
}
|
||||||
|
|
||||||
void WriteRegister(uint16_t addr, uint8_t value)
|
void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr == 0xA131) {
|
if(addr == 0xA131) {
|
||||||
_mode = value;
|
_mode = value;
|
||||||
|
|
|
@ -9,17 +9,17 @@ private:
|
||||||
bool _needUpdate = false;
|
bool _needUpdate = false;
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual uint16_t GetCHRPageSize() { return 0x1000; }
|
virtual uint16_t GetCHRPageSize() override { return 0x1000; }
|
||||||
virtual uint32_t GetChrRamSize() { return 0x1000; }
|
virtual uint32_t GetChrRamSize() override { return 0x1000; }
|
||||||
virtual uint16_t GetChrRamPageSize() { return 0x1000; }
|
virtual uint16_t GetChrRamPageSize() override { return 0x1000; }
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC3::StreamState(saving);
|
MMC3::StreamState(saving);
|
||||||
Stream(_chrLatch[0], _chrLatch[1], _needUpdate);
|
Stream(_chrLatch[0], _chrLatch[1], _needUpdate);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void UpdateChrMapping()
|
virtual void UpdateChrMapping() override
|
||||||
{
|
{
|
||||||
uint16_t page;
|
uint16_t page;
|
||||||
|
|
||||||
|
@ -35,7 +35,7 @@ protected:
|
||||||
_needUpdate = false;
|
_needUpdate = false;
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void NotifyVRAMAddressChange(uint16_t addr)
|
virtual void NotifyVRAMAddressChange(uint16_t addr) override
|
||||||
{
|
{
|
||||||
if(_needUpdate) {
|
if(_needUpdate) {
|
||||||
UpdateChrMapping();
|
UpdateChrMapping();
|
||||||
|
|
|
@ -6,7 +6,7 @@
|
||||||
class MMC3_182 : public MMC3
|
class MMC3_182 : public MMC3
|
||||||
{
|
{
|
||||||
protected:
|
protected:
|
||||||
virtual void WriteRegister(uint16_t addr, uint8_t value)
|
virtual void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
switch(addr & 0xE001) {
|
switch(addr & 0xE001) {
|
||||||
case 0x8001: MMC3::WriteRegister(0xA000, value); break;
|
case 0x8001: MMC3::WriteRegister(0xA000, value); break;
|
||||||
|
|
|
@ -9,9 +9,9 @@ private:
|
||||||
uint8_t _exRegs[2];
|
uint8_t _exRegs[2];
|
||||||
|
|
||||||
protected:
|
protected:
|
||||||
virtual bool AllowRegisterRead() { return true; }
|
virtual bool AllowRegisterRead() override { return true; }
|
||||||
|
|
||||||
virtual void InitMapper()
|
virtual void InitMapper() override
|
||||||
{
|
{
|
||||||
MMC3::InitMapper();
|
MMC3::InitMapper();
|
||||||
|
|
||||||
|
@ -21,7 +21,7 @@ protected:
|
||||||
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default)
|
virtual void SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memoryType = ChrMemoryType::Default) override
|
||||||
{
|
{
|
||||||
if((_chrMode && slot >= 4) || (!_chrMode && slot < 4)) {
|
if((_chrMode && slot >= 4) || (!_chrMode && slot < 4)) {
|
||||||
page |= 0x100;
|
page |= 0x100;
|
||||||
|
@ -29,7 +29,7 @@ protected:
|
||||||
BaseMapper::SelectCHRPage(slot, page);
|
BaseMapper::SelectCHRPage(slot, page);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void SelectPRGPage(uint16_t slot, uint16_t page, PrgMemoryType memoryType = PrgMemoryType::PrgRom)
|
virtual void SelectPRGPage(uint16_t slot, uint16_t page, PrgMemoryType memoryType = PrgMemoryType::PrgRom) override
|
||||||
{
|
{
|
||||||
if(!(_exRegs[0] & 0x80)) {
|
if(!(_exRegs[0] & 0x80)) {
|
||||||
BaseMapper::SelectPRGPage(slot, page & 0x3F, memoryType);
|
BaseMapper::SelectPRGPage(slot, page & 0x3F, memoryType);
|
||||||
|
@ -59,13 +59,13 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual uint8_t ReadRegister(uint16_t addr)
|
virtual uint8_t ReadRegister(uint16_t addr) override
|
||||||
{
|
{
|
||||||
uint8_t security[4] = { 0x83,0x83,0x42,0x00 };
|
uint8_t security[4] = { 0x83,0x83,0x42,0x00 };
|
||||||
return security[_exRegs[1] & 0x03];
|
return security[_exRegs[1] & 0x03];
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void WriteRegister(uint16_t addr, uint8_t value)
|
virtual void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr < 0x8000) {
|
if(addr < 0x8000) {
|
||||||
if(addr == 0x5000 || addr == 0x6000) {
|
if(addr == 0x5000 || addr == 0x6000) {
|
||||||
|
@ -86,7 +86,7 @@ protected:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC3::StreamState(saving);
|
MMC3::StreamState(saving);
|
||||||
Stream(_exRegs[0], _exRegs[1]);
|
Stream(_exRegs[0], _exRegs[1]);
|
||||||
|
|
|
@ -8,9 +8,9 @@ class MMC3_189 : public MMC3
|
||||||
private:
|
private:
|
||||||
uint8_t _prgReg = 0;
|
uint8_t _prgReg = 0;
|
||||||
|
|
||||||
virtual uint16_t RegisterStartAddress() { return 0x4120; }
|
virtual uint16_t RegisterStartAddress() override { return 0x4120; }
|
||||||
|
|
||||||
virtual void WriteRegister(uint16_t addr, uint8_t value)
|
virtual void WriteRegister(uint16_t addr, uint8_t value) override
|
||||||
{
|
{
|
||||||
if(addr <= 0x4FFF) {
|
if(addr <= 0x4FFF) {
|
||||||
_prgReg = value;
|
_prgReg = value;
|
||||||
|
@ -20,7 +20,7 @@ private:
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void UpdateState()
|
virtual void UpdateState() override
|
||||||
{
|
{
|
||||||
MMC3::UpdateState();
|
MMC3::UpdateState();
|
||||||
|
|
||||||
|
@ -33,7 +33,7 @@ private:
|
||||||
SelectPRGPage(3, prgPage+3);
|
SelectPRGPage(3, prgPage+3);
|
||||||
}
|
}
|
||||||
|
|
||||||
virtual void StreamState(bool saving)
|
virtual void StreamState(bool saving) override
|
||||||
{
|
{
|
||||||
MMC3::StreamState(saving);
|
MMC3::StreamState(saving);
|
||||||
Stream(_prgReg);
|
Stream(_prgReg);
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Reference in a new issue