Added support for Bandai's EEPROMs

Core/BandaiFcg.h

@@ -4,6 +4,9 @@
 #include "Console.h"
 #include "MemoryManager.h"
 #include "DatachBarcodeReader.h"
+#include "BaseEeprom24C0X.h"
+#include "Eeprom24C01.h"
+#include "Eeprom24C02.h"
 
 class BandaiFcg : public BaseMapper
 {
@@ -16,6 +19,9 @@ private:
 	uint8_t _chrRegs[8];
 	shared_ptr<DatachBarcodeReader> _barcodeReader;
 
+	shared_ptr<BaseEeprom24C0X> _standardEeprom;
+	shared_ptr<BaseEeprom24C0X> _extraEeprom;
+
 protected:
 	uint16_t GetPRGPageSize() override { return 0x4000; }
 	uint16_t GetCHRPageSize() override { return 0x400; }
@@ -32,22 +38,52 @@ protected:
 		_irqReload = 0;
 		_prgPage = 0;
 		_prgBankSelect = 0;
-		
-		if(_romInfo.MapperID == 157) {
-			//"Mapper 157 is used for Datach Joint ROM System boards"
-			_barcodeReader.reset(new DatachBarcodeReader(_console));
-			_mapperControlDevice = _barcodeReader;
-		}
 
 		//Only allow reads from 0x6000 to 0x7FFF
 		RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Read);
 
-		if(_romInfo.MapperID != 16 || GetPRGPageCount() >= 0x20) {
+		if(_romInfo.MapperID == 157) {
+			//"Mapper 157 is used for Datach Joint ROM System boards"
+			_barcodeReader.reset(new DatachBarcodeReader(_console));
+			_mapperControlDevice = _barcodeReader;
+
+			//Datach Joint ROM System
+			//"It contains an internal 256-byte serial EEPROM (24C02) that is shared among all Datach games."
+			//"One game, Battle Rush: Build up Robot Tournament, has an additional external 128-byte serial EEPROM (24C01) on the game cartridge."
+			//"The NES 2.0 header's PRG-NVRAM field will only denote whether the game cartridge has an additional 128-byte serial EEPROM"
+			if(!IsNes20() || _romInfo.NesHeader.GetSaveRamSize() == 128) {
+				_extraEeprom.reset(new Eeprom24C02(_console));
+			}
+			
+			//All mapper 157 games have an internal 256-byte EEPROM
+			_standardEeprom.reset(new Eeprom24C01(_console));
+		} else if(_romInfo.MapperID == 159) {
+			//LZ93D50 with 128 byte serial EEPROM (24C01)
+			_standardEeprom.reset(new Eeprom24C01(_console));
+		} else if(_romInfo.MapperID == 16) {
+			//"INES Mapper 016 submapper 4: FCG-1/2 ASIC, no serial EEPROM, banked CHR-ROM"
+			//"INES Mapper 016 submapper 5: LZ93D50 ASIC and no or 256-byte serial EEPROM, banked CHR-ROM"
+			
+			//Add a 256 byte serial EEPROM (24C02)
+			if(!IsNes20() || (_romInfo.SubMapperID == 5 && _romInfo.NesHeader.GetSaveRamSize() == 256)) {
+				//Connect a 256-byte EEPROM for iNES roms, and when submapper 5 + 256 bytes of save ram in header
+				_standardEeprom.reset(new Eeprom24C02(_console));
+			}
+		}
+
+		if(_romInfo.MapperID != 16) {
 			//"For iNES Mapper 153 (with SRAM), the writeable ports must only be mirrored across $8000-$FFFF."
 			//"Mappers 157 and 159 do not need to support the FCG-1 and -2 and so should only mirror the ports across $8000-$FFFF."
-
+			if(_romInfo.MapperID == 153) {
-			//TODO: Check if this is needed
+				//Mapper 153 has regular save ram from $6000-$7FFF, need to remove the register for both read & writes
-			//RemoveRegisterRange(0x6000, 0x7FFF, MemoryOperation::Any);
+				RemoveRegisterRange(0x6000, 0x7FFF, MemoryOperation::Any);
+			} else {
+				RemoveRegisterRange(0x6000, 0x7FFF, MemoryOperation::Write);
+			}
+		} else if(_romInfo.MapperID == 16 && _romInfo.SubMapperID == 4) {
+			RemoveRegisterRange(0x8000, 0xFFFF, MemoryOperation::Write);
+		} else if(_romInfo.MapperID == 16 && _romInfo.SubMapperID == 5) {
+			RemoveRegisterRange(0x6000, 0x7FFF, MemoryOperation::Write);
 		}
 
 		//Last bank
@@ -60,6 +96,27 @@ protected:
 
 		ArrayInfo<uint8_t> chrRegs{ _chrRegs, 8 };
 		Stream(_irqEnabled, _irqCounter, _irqReload, _prgPage, _prgBankSelect, chrRegs);
+
+		if(_standardEeprom) {
+			SnapshotInfo eeprom { _standardEeprom.get() };
+			Stream(eeprom);
+		}
+
+		if(_extraEeprom) {
+			SnapshotInfo eeprom { _extraEeprom.get() };
+			Stream(eeprom);
+		}
+	}
+
+	void SaveBattery() override
+	{
+		BaseMapper::SaveBattery();
+		if(_standardEeprom) {
+			_standardEeprom->SaveBattery();
+		}
+		if(_extraEeprom) {
+			_extraEeprom->SaveBattery();
+		}
 	}
 
 	void ProcessCpuClock() override
@@ -74,11 +131,22 @@ protected:
 			_irqCounter--;
 		}
 	}
-	
+
 	uint8_t ReadRegister(uint16_t addr) override
 	{
-		//Pretend EEPROM data is always 0
+		uint8_t output = 0;
-		return (_barcodeReader ? _barcodeReader->GetOutput() : 0) | _console->GetMemoryManager()->GetOpenBus(0xE7);
+
+		if(_barcodeReader) {
+			output |= _barcodeReader->GetOutput();
+		}
+
+		if(_extraEeprom && _standardEeprom) {
+			output |= (_standardEeprom->Read() && _extraEeprom->Read()) << 4;
+		} else if(_standardEeprom) {
+			output |= (_standardEeprom->Read() << 4);
+		}
+
+		return output | _console->GetMemoryManager()->GetOpenBus(0xE7);
 	}
 
 	void WriteRegister(uint16_t addr, uint8_t value) override
@@ -96,6 +164,10 @@ protected:
 				} else if(!HasChrRam() && _romInfo.MapperID != 157) {
 					SelectCHRPage(addr & 0x07, value);
 				}
+
+				if(_extraEeprom && _romInfo.MapperID == 157 && (addr & 0x0F) <= 3) {
+					_extraEeprom->WriteScl((value >> 3) & 0x01);
+				}
 				break;
 
 			case 0x08:
@@ -113,22 +185,48 @@ protected:
 				break;
 
 			case 0x0A:
-				//Wiki claims there is no reload value, however this seems to be the only way to make Famicom Jump II - Saikyou no 7 Nin work properly 
 				_irqEnabled = (value & 0x01) == 0x01;
-				_irqCounter = _irqReload;
+
+				//Wiki claims there is no reload value, however this seems to be the only way to make Famicom Jump II - Saikyou no 7 Nin work properly 
+				if(_romInfo.MapperID != 16 || !IsNes20() || _romInfo.SubMapperID == 5) {
+					//"On the LZ93D50 (Submapper 5), writing to this register also copies the latch to the actual counter."
+					_irqCounter = _irqReload;
+				}
+
 				_console->GetCpu()->ClearIrqSource(IRQSource::External);
 				break;
 
 			case 0x0B:
-				_irqReload = (_irqReload & 0xFF00) | value;
+				if(_romInfo.MapperID != 16 || !IsNes20() || _romInfo.SubMapperID != 4) {
+					//"On the LZ93D50 (Submapper 5), these registers instead modify a latch that will only be copied to the actual counter when register $800A is written to."
+					_irqReload = (_irqReload & 0xFF00) | value;
+				} else {
+					//"On the FCG-1/2 (Submapper 4), writing to these two registers directly modifies the counter itself; all such games therefore disable counting before changing the counter value."
+					_irqCounter = (_irqCounter & 0xFF00) | value;
+				}
 				break;
 
 			case 0x0C:
-				_irqReload = (_irqReload & 0xFF) | (value << 8);
+				if(_romInfo.MapperID != 16 || !IsNes20() || _romInfo.SubMapperID != 4) {
+					_irqReload = (_irqReload & 0xFF) | (value << 8);
+				} else {
+					_irqCounter = (_irqCounter & 0xFF00) | value;
+				}
 				break;
 
 			case 0x0D:
-				//TODO: PRG RAM Enable / EEPROM Control
+				if(_romInfo.MapperID == 153) {
+					SetCpuMemoryMapping(0x6000, 0x7FFF, 0, HasBattery() ? PrgMemoryType::SaveRam : PrgMemoryType::WorkRam, value & 0x20 ? MemoryAccessType::ReadWrite : MemoryAccessType::NoAccess);
+				} else {
+					uint8_t scl = (value & 0x20) >> 5;
+					uint8_t sda = (value & 0x40) >> 6;
+					if(_standardEeprom) {
+						_standardEeprom->Write(scl, sda);
+					}
+					if(_extraEeprom) {
+						_extraEeprom->WriteSda(sda);
+					}
+				}
 				break;
 		}
 	}

Core/BaseEeprom24C0X.h

@@ -0,0 +1,57 @@
+#pragma once
+#include "stdafx.h"
+#include "Snapshotable.h"
+
+class BaseEeprom24C0X : public Snapshotable
+{
+protected:
+	enum class Mode
+	{
+		Idle = 0,
+		Address = 1,
+		Read = 2,
+		Write = 3,
+		SendAck = 4,
+		WaitAck = 5,
+		ChipAddress = 6
+	};
+
+	shared_ptr<Console> _console;
+
+	Mode _mode = Mode::Idle;
+	Mode _nextMode = Mode::Idle;
+	uint8_t _chipAddress = 0;
+	uint8_t _address = 0;
+	uint8_t _data = 0;
+	uint8_t _counter = 0;
+	uint8_t _output = 0;
+	uint8_t _prevScl = 0;
+	uint8_t _prevSda = 0;
+	uint8_t _romData[256];
+
+	void StreamState(bool saving) override
+	{
+		ArrayInfo<uint8_t> romData { _romData, 256 };
+		Stream(_mode, _nextMode, _chipAddress, _address, _data, _counter, _output, _prevScl, _prevSda, romData);
+	}
+
+public:
+	virtual void Write(uint8_t scl, uint8_t sda) = 0;
+	virtual void SaveBattery() = 0;
+	
+	uint8_t Read()
+	{
+		return _output;
+	}
+
+	void WriteScl(uint8_t scl)
+	{
+		Write(scl, _prevSda);
+	}
+
+	void WriteSda(uint8_t sda)
+	{
+		Write(_prevScl, sda);
+	}
+};
+

Core/BaseMapper.cpp

@@ -374,7 +374,12 @@ void BaseMapper::SelectCHRPage(uint16_t slot, uint16_t page, ChrMemoryType memor
 
 void BaseMapper::InitializeRam(void* data, uint32_t length)
 {
-	switch(_console->GetSettings()->GetRamPowerOnState()) {
+	InitializeRam(_console->GetSettings()->GetRamPowerOnState(), data, length);
+}
+
+void BaseMapper::InitializeRam(RamPowerOnState powerOnState, void* data, uint32_t length)
+{
+	switch(powerOnState) {
 		default:
 		case RamPowerOnState::AllZeros: memset(data, 0, length); break;
 		case RamPowerOnState::AllOnes: memset(data, 0xFF, length); break;

Core/BaseMapper.h

@@ -197,6 +197,7 @@ public:
 	uint8_t DebugReadVRAM(uint16_t addr, bool disableSideEffects = true);
 
 	void InitializeRam(void* data, uint32_t length);
+	static void InitializeRam(RamPowerOnState powerOnState, void* data, uint32_t length);
 
 	void CopyChrTile(uint32_t address, uint8_t *dest);
 

Core/Core.vcxproj

@@ -513,6 +513,7 @@
     <ClInclude Include="BandaiHyperShot.h" />
     <ClInclude Include="BandaiMicrophone.h" />
     <ClInclude Include="BarcodeBattlerReader.h" />
+    <ClInclude Include="BaseEeprom24C0X.h" />
     <ClInclude Include="BaseLoader.h" />
     <ClInclude Include="BaseRenderer.h" />
     <ClInclude Include="BaseSoundManager.h" />
@@ -534,6 +535,8 @@
     <ClInclude Include="DragonFighter.h" />
     <ClInclude Include="DrawScreenBufferCommand.h" />
     <ClInclude Include="DummyCpu.h" />
+    <ClInclude Include="Eeprom24C01.h" />
+    <ClInclude Include="Eeprom24C02.h" />
     <ClInclude Include="FaridSlrom.h" />
     <ClInclude Include="FaridUnrom.h" />
     <ClInclude Include="FdsSystemActionManager.h" />

Core/Core.vcxproj.filters

@@ -1478,6 +1478,15 @@
     <ClInclude Include="PerformanceTracker.h">
       <Filter>Debugger</Filter>
     </ClInclude>
+    <ClInclude Include="Eeprom24C01.h">
+      <Filter>Nes\Mappers\Bandai</Filter>
+    </ClInclude>
+    <ClInclude Include="Eeprom24C02.h">
+      <Filter>Nes\Mappers\Bandai</Filter>
+    </ClInclude>
+    <ClInclude Include="BaseEeprom24C0X.h">
+      <Filter>Nes\Mappers\Bandai</Filter>
+    </ClInclude>
   </ItemGroup>
   <ItemGroup>
     <ClCompile Include="stdafx.cpp">

Core/Eeprom24C01.h

@@ -0,0 +1,126 @@
+#pragma once
+#include "stdafx.h"
+#include "BaseEeprom24C0X.h"
+#include "BatteryManager.h"
+
+class Eeprom24C01 : public BaseEeprom24C0X
+{
+private:
+	void WriteBit(uint8_t &dest, uint8_t value)
+	{
+		if(_counter < 8) {
+			uint8_t mask = ~(1 << _counter);
+			dest = (dest & mask) | (value << _counter);
+			_counter++;
+		}
+	}
+
+	void ReadBit()
+	{
+		if(_counter < 8) {
+			_output = (_data & (1 << _counter)) ? 1 : 0;
+			_counter++;
+		}
+	}
+
+public:
+	Eeprom24C01(shared_ptr<Console> console)
+	{
+		_console = console;
+		BaseMapper::InitializeRam(_console->GetSettings()->GetRamPowerOnState(), _romData, 128);
+		_console->GetBatteryManager()->LoadBattery(".eeprom128", _romData, 128);
+	}
+
+	~Eeprom24C01()
+	{
+		SaveBattery();
+	}
+
+	void SaveBattery() override
+	{
+		_console->GetBatteryManager()->SaveBattery(".eeprom128", _romData, 128);
+	}
+
+	void Write(uint8_t scl, uint8_t sda)
+	{
+		if(_prevScl && scl && sda < _prevSda) {
+			//"START is identified by a high to low transition of the SDA line while the clock SCL is *stable* in the high state"
+			_mode = Mode::Address;
+			_address = 0;
+			_counter = 0;
+			_output = 1;
+		} else if(_prevScl && scl && sda > _prevSda) {
+			//"STOP is identified by a low to high transition of the SDA line while the clock SCL is *stable* in the high state"
+			_mode = Mode::Idle;
+			_output = 1;
+		} else if(scl > _prevScl) {
+			//Clock rise
+			switch(_mode) {
+				case Mode::Address:
+					//To initiate a write operation, the master sends a start condition followed by a seven bit word address and a write bit.
+					if(_counter < 7) {
+						WriteBit(_address, sda);
+					} else if(_counter == 7) {
+						//8th bit to determine if we're in read or write mode
+						_counter = 8;
+
+						if(sda) {
+							//Read mode
+							_nextMode = Mode::Read;
+							_data = _romData[_address & 0x7F];
+						} else {
+							_nextMode = Mode::Write;
+						}
+					}
+					break;
+				case Mode::SendAck: _output = 0; break;
+				case Mode::Read: ReadBit(); break;
+				case Mode::Write: WriteBit(_data, sda); break;
+				case Mode::WaitAck:
+					if(!sda) {
+						//We expected an ack, but received something else, return to idle mode
+						_nextMode = Mode::Idle;
+					}
+					break;
+			}
+		} else if(scl < _prevScl) {
+			//Clock fall
+			switch(_mode) {
+				case Mode::Address:
+					if(_counter == 8) {
+						//After receiving the address, "the X24C01 responds with an acknowledge, then waits for eight bits of data"
+						_mode = Mode::SendAck;
+						_output = 1;
+					}
+					break;
+
+				case Mode::SendAck:
+					//After sending an ack, move to the next mode of operation
+					_mode = _nextMode;
+					_counter = 0;
+					_output = 1;
+					break;
+
+				case Mode::Read:
+					if(_counter == 8) {
+						//After sending all 8 bits, wait for an ack
+						_mode = Mode::WaitAck;
+						_address = (_address + 1) & 0x7F;
+					}
+					break;
+
+				case Mode::Write:
+					if(_counter == 8) {
+						//After receiving all 8 bits, send an ack and then wait
+						_mode = Mode::SendAck;
+						_nextMode = Mode::Idle;
+						_romData[_address & 0x7F] = _data;
+						_address = (_address + 1) & 0x7F;
+					}
+					break;
+			}
+		}
+		_prevScl = scl;
+		_prevSda = sda;
+	}
+};

Core/Eeprom24C02.h

@@ -0,0 +1,146 @@
+#pragma once
+#include "stdafx.h"
+#include "BaseEeprom24C0X.h"
+#include "BatteryManager.h"
+
+class Eeprom24C02 : public BaseEeprom24C0X
+{
+private:
+	void WriteBit(uint8_t &dest, uint8_t value)
+	{
+		if(_counter < 8) {
+			uint8_t mask = ~(1 << (7 - _counter));
+			dest = (dest & mask) | (value << (7 - _counter));
+			_counter++;
+		}
+	}
+
+	void ReadBit()
+	{
+		if(_counter < 8) {
+			_output = (_data & (1 << (7 - _counter))) ? 1 : 0;
+			_counter++;
+		}
+	}
+
+public:
+	Eeprom24C02(shared_ptr<Console> console)
+	{
+		_console = console;
+		BaseMapper::InitializeRam(_console->GetSettings()->GetRamPowerOnState(), _romData, 256);
+		_console->GetBatteryManager()->LoadBattery(".eeprom256", _romData, 256);
+	}
+
+	~Eeprom24C02()
+	{
+		SaveBattery();
+	}
+
+	void SaveBattery() override
+	{
+		_console->GetBatteryManager()->SaveBattery(".eeprom256", _romData, 256);
+	}
+
+	void Write(uint8_t scl, uint8_t sda)
+	{
+		if(_prevScl && scl && sda < _prevSda) {
+			//"START is identified by a high to low transition of the SDA line while the clock SCL is *stable* in the high state"
+			_mode = Mode::ChipAddress;
+			_counter = 0;
+			_output = 1;
+		} else if(_prevScl && scl && sda > _prevSda) {
+			//"STOP is identified by a low to high transition of the SDA line while the clock SCL is *stable* in the high state"
+			_mode = Mode::Idle;
+			_output = 1;
+		} else if(scl > _prevScl) {
+			//Clock rise
+			switch(_mode) {
+				case Mode::ChipAddress: WriteBit(_chipAddress, sda); break;
+				case Mode::Address: WriteBit(_address, sda); break;
+				case Mode::Read: ReadBit(); break;
+				case Mode::Write: WriteBit(_data, sda); break;
+				case Mode::SendAck: _output = 0; break;
+				case Mode::WaitAck:
+					if(!sda) {
+						_nextMode = Mode::Read;
+						_data = _romData[_address];
+					}
+					break;
+			}
+		} else if(scl < _prevScl) {
+			//Clock fall
+			switch(_mode) {
+				case Mode::ChipAddress:
+					//"Upon a correct compare the X24C02 outputs an acknowledge on the SDA line"
+					if(_counter == 8) {
+						if((_chipAddress & 0xA0) == 0xA0) {
+							_mode = Mode::SendAck;
+							_counter = 0;
+							_output = 1;
+
+							//"The last bit of the slave address defines the operation to
+							//be performed. When set to one a read operation is
+							//selected, when set to zero a write operations is selected"
+							if(_chipAddress & 0x01) {
+								//"Current Address Read"
+								//"Upon receipt of the slave address with the R/W
+								//bit set to one, the X24C02 issues an acknowledge 
+								//and transmits the eight bit word during the next eight clock cycles"
+								_nextMode = Mode::Read;
+								_data = _romData[_address];
+							} else {
+								_nextMode = Mode::Address;
+							}
+						} else {
+							//This chip wasn't selected, go back to idle mode
+							_mode = Mode::Idle;
+							_counter = 0;
+							_output = 1;
+						}
+					}
+					break;
+
+				case Mode::Address:
+					if(_counter == 8) {
+						//Finished receiving all 8 bits of the address, send an ack and then starting writing the value
+						_counter = 0;
+						_mode = Mode::SendAck;
+						_nextMode = Mode::Write;
+						_output = 1;
+					}
+					break;
+
+				case Mode::Read:
+					if(_counter == 8) {
+						//Finished sending all 8 bits, wait for an ack
+						_mode = Mode::WaitAck;
+						_address = (_address + 1) & 0xFF;
+					}
+					break;
+
+				case Mode::Write:
+					if(_counter == 8) {
+						//Finished receiving all 8 bits, send an ack
+						_counter = 0;
+						_mode = Mode::SendAck;
+						_nextMode = Mode::Write;
+						if(_address == 0) {
+							std::cout << "test";
+						}
+						_romData[_address] = _data;
+						_address = (_address + 1) & 0xFF;
+					}
+					break;
+
+				case Mode::SendAck:
+				case Mode::WaitAck:
+					_mode = _nextMode;
+					_counter = 0;
+					_output = 1;
+					break;
+			}
+		}
+		_prevScl = scl;
+		_prevSda = sda;
+	}
+};

GUI.NET/Dependencies/MesenDB.txt

@@ -4,7 +4,7 @@
 #
 # Automatically generated database based on Nestopia's DB and NesCartDB
 #
-# Generated on 2018-07-08 using:
+# Generated on 2019-01-26 using:
 #     -NesCartDB (dated 2017-08-21)
 #     -Nestopia UE's latest DB (dated 2015-10-22) 
 # 
@@ -3829,7 +3829,7 @@
 3F111334,NesNtsc,UNK,,,245,256,256,,0,8,1,h,,,,,
 3F13E300,NesNtsc,UNK,,,0,16,8,,0,0,0,v,,,,,
 3F15A573,NesNtsc,UNK,,,1,128,,,0,0,0,h,,,,,
-3F15D20D,Famicom,BANDAI-JUMP2,BA-JUMP2,FCG-3,16,512,,8,0,8,1,,,,,,
+3F15D20D,Famicom,BANDAI-JUMP2,BA-JUMP2,FCG-3,153,512,,8,0,8,1,,,,,,
 3F17204B,NesNtsc,UNK,,,1,128,128,,0,0,0,h,,,,,
 3F1E3F2A,NesNtsc,UNK,,,0,32,8,,0,0,0,h,,,,,
 3F20B2B5,NesNtsc,UNK,,,4,128,256,,0,0,0,h,,,,,

Libretro/MesenDB.inc

@@ -1,11 +1,11 @@
-const unsigned char MesenDatabase[757505] = {
+const unsigned char MesenDatabase[757506] = {
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@@ -3830,7 +3830,7 @@ const unsigned char MesenDatabase[757505] = {
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