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Taito X1017 (Mapper 82) support

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This commit is contained in:
Souryo 2016-02-22 19:52:58 -05:00
parent 8743f11ba9
commit f69caf1a29
4 changed files with 136 additions and 6 deletions
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1
Core/Core.vcxproj
View file

@ -504,6 +504,7 @@
<ClInclude Include="Sunsoft93.h" />
<ClInclude Include="TaitoTc0190.h" />
<ClInclude Include="TaitoX1005.h" />
<ClInclude Include="TaitoX1017.h" />
<ClInclude Include="TraceLogger.h" />
<ClInclude Include="TriangleChannel.h" />
<ClInclude Include="TxSRom.h" />

18
Core/Core.vcxproj.filters
View file

@ -69,6 +69,9 @@
<Filter Include="Nes\APU\Filters">
<UniqueIdentifier>{783f3638-4293-480f-b525-2485c4209ff5}</UniqueIdentifier>
</Filter>
<Filter Include="Nes\Mappers\Taito">
<UniqueIdentifier>{1d706c9e-639f-4da0-a7ce-50d04b2b6a7e}</UniqueIdentifier>
</Filter>
</ItemGroup>
<ItemGroup>
<ClInclude Include="stdafx.h">
@ -209,9 +212,6 @@
<ClInclude Include="CpRom.h">
<Filter>Nes\Mappers</Filter>
</ClInclude>
<ClInclude Include="TaitoTc0190.h">
<Filter>Nes\Mappers</Filter>
</ClInclude>
<ClInclude Include="GxRom.h">
<Filter>Nes\Mappers</Filter>
</ClInclude>
@ -224,9 +224,6 @@
<ClInclude Include="Bandai74161_7432.h">
<Filter>Nes\Mappers</Filter>
</ClInclude>
<ClInclude Include="TaitoX1005.h">
<Filter>Nes\Mappers</Filter>
</ClInclude>
<ClInclude Include="BnRom.h">
<Filter>Nes\Mappers</Filter>
</ClInclude>
@ -566,6 +563,15 @@
<ClInclude Include="BaseSoundFilter.h">
<Filter>Nes\APU\Filters</Filter>
</ClInclude>
<ClInclude Include="TaitoX1005.h">
<Filter>Nes\Mappers\Taito</Filter>
</ClInclude>
<ClInclude Include="TaitoTc0190.h">
<Filter>Nes\Mappers\Taito</Filter>
</ClInclude>
<ClInclude Include="TaitoX1017.h">
<Filter>Nes\Mappers\Taito</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
<ClCompile Include="stdafx.cpp">

2
Core/MapperFactory.cpp
View file

@ -77,6 +77,7 @@
#include "Sunsoft184.h"
#include "TaitoTc0190.h"
#include "TaitoX1005.h"
#include "TaitoX1017.h"
#include "TxSRom.h"
#include "UnlPci556.h"
#include "UNROM.h"
@ -147,6 +148,7 @@ BaseMapper* MapperFactory::GetMapperFromID(RomData &romData)
case 78: return new JalecoJf16(romData.SubMapperID == 3);
case 79: return new Nina03_06(false);
case 80: return new TaitoX1005(false);
case 82: return new TaitoX1017();
case 85: return new VRC7();
case 87: return new JalecoJfxx(false);
case 88: return new Namco108_88();

121
Core/TaitoX1017.h Normal file
View file

@ -0,0 +1,121 @@
#pragma once
#include "stdafx.h"
#include "BaseMapper.h"
class TaitoX1017 : public BaseMapper
{
private:
uint8_t _chrMode;
uint8_t _chrRegs[6];
uint8_t _ramPermission[3];
void UpdateRamAccess()
{
SetCpuMemoryMapping(0x6000, 0x63FF, 0, PrgMemoryType::SaveRam, _ramPermission[0] == 0xCA ? MemoryAccessType::ReadWrite : MemoryAccessType::NoAccess);
SetCpuMemoryMapping(0x6400, 0x67FF, 1, PrgMemoryType::SaveRam, _ramPermission[0] == 0xCA ? MemoryAccessType::ReadWrite : MemoryAccessType::NoAccess);
SetCpuMemoryMapping(0x6800, 0x6BFF, 2, PrgMemoryType::SaveRam, _ramPermission[1] == 0x69 ? MemoryAccessType::ReadWrite : MemoryAccessType::NoAccess);
SetCpuMemoryMapping(0x6C00, 0x6FFF, 3, PrgMemoryType::SaveRam, _ramPermission[1] == 0x69 ? MemoryAccessType::ReadWrite : MemoryAccessType::NoAccess);
SetCpuMemoryMapping(0x7000, 0x73FF, 4, PrgMemoryType::SaveRam, _ramPermission[2] == 0x84 ? MemoryAccessType::ReadWrite : MemoryAccessType::NoAccess);
}
protected:
virtual uint16_t GetPRGPageSize() { return 0x2000; }
virtual uint16_t GetCHRPageSize() { return 0x0400; }
virtual uint16_t RegisterStartAddress() { return 0x7EF0; }
virtual uint16_t RegisterEndAddress() { return 0x7EFF; }
virtual uint32_t GetSaveRamSize() { return 0x1400; }
virtual uint32_t GetSaveRamPageSize() { return 0x400; }
void InitMapper()
{
_chrMode = 0;
memset(_ramPermission, 0, sizeof(_ramPermission));
memset(_chrRegs, 0, sizeof(_chrRegs));
SelectPRGPage(3, -1);
UpdateRamAccess();
}
virtual bool ForceBattery()
{
//Patch: Force battery, because some headers are marked as having no battery even though the game expects one
return true;
}
void UpdateChrBanking()
{
if(_chrMode == 0) {
SelectChrPage2x(0, _chrRegs[0]);
SelectChrPage2x(1, _chrRegs[1]);
SelectCHRPage(4, _chrRegs[2]);
SelectCHRPage(5, _chrRegs[3]);
SelectCHRPage(6, _chrRegs[4]);
SelectCHRPage(7, _chrRegs[5]);
} else {
SelectCHRPage(0, _chrRegs[2]);
SelectCHRPage(1, _chrRegs[3]);
SelectCHRPage(2, _chrRegs[4]);
SelectCHRPage(3, _chrRegs[5]);
SelectChrPage2x(2, _chrRegs[0]);
SelectChrPage2x(3, _chrRegs[1]);
}
}
void WriteRegister(uint16_t addr, uint8_t value)
{
switch(addr) {
case 0x7EF0:
case 0x7EF1:
case 0x7EF2:
case 0x7EF3:
case 0x7EF4:
case 0x7EF5:
_chrRegs[(addr & 0xF)] = value;
UpdateChrBanking();
break;
case 0x7EF6:
SetMirroringType((value & 0x01) == 0x01 ? MirroringType::Vertical : MirroringType::Horizontal);
_chrMode = (value & 0x02) >> 1;
UpdateChrBanking();
break;
case 0x7EF7:
case 0x7EF8:
case 0x7EF9:
_ramPermission[(addr & 0xF) - 7] = value;
UpdateRamAccess();
break;
case 0x7EFA:
SelectPRGPage(0, value >> 2);
break;
case 0x7EFB:
SelectPRGPage(1, value >> 2);
break;
case 0x7EFC:
SelectPRGPage(2, value >> 2);
break;
}
}
virtual void StreamState(bool saving)
{
BaseMapper::StreamState(saving);
StreamArray<uint8_t>(_ramPermission, 3);
StreamArray<uint8_t>(_chrRegs, 6);
Stream<uint8_t>(_chrMode);
if(!saving) {
UpdateRamAccess();
}
}
};