51 lines
No EOL
1.8 KiB
C++
51 lines
No EOL
1.8 KiB
C++
#pragma once
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#include "stdafx.h"
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#include "BaseMapper.h"
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//Missing flashing support + only tested on 1 game demo
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class UnRom512 : public BaseMapper
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{
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private:
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bool _enableMirroringBit;
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protected:
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virtual uint16_t GetPRGPageSize() override { return 0x4000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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virtual uint16_t RegisterStartAddress() override { return 0x8000; }
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virtual uint16_t RegisterEndAddress() override { return 0xFFFF; }
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virtual uint32_t GetChrRamSize() override { return 0x8000; }
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virtual bool HasBusConflicts() override { return !HasBattery(); }
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void InitMapper() override
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{
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SelectPRGPage(1, -1);
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_enableMirroringBit = false;
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switch(_romInfo.NesHeader.Byte6 & 0x09) {
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case 0: SetMirroringType(MirroringType::Horizontal); break;
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case 1: SetMirroringType(MirroringType::Vertical); break;
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case 8: SetMirroringType(MirroringType::ScreenAOnly); _enableMirroringBit = true; break;
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case 9: SetMirroringType(MirroringType::FourScreens); break;
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}
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if(GetMirroringType() == MirroringType::FourScreens && _chrRam && _chrRamSize >= 0x8000) {
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//InfiniteNesLives four-screen mirroring variation, last 8kb of CHR RAM is always mapped to 0x2000-0x3FFF (0x3EFF due to palette)
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//This "breaks" the "UNROM512_4screen_test" test ROM - was the ROM actually tested on this board? Seems to contradict hardware specs
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SetPpuMemoryMapping(0x2000, 0x3FFF, ChrMemoryType::ChrRam, 0x6000, MemoryAccessType::ReadWrite);
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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if(!HasBattery() || addr >= 0xC000) {
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SelectPRGPage(0, value & 0x1F);
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SelectCHRPage(0, (value >> 5) & 0x03);
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if(_enableMirroringBit) {
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SetMirroringType(value & 0x80 ? MirroringType::ScreenBOnly : MirroringType::ScreenAOnly);
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}
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} else {
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//Unimplemented (flash process)
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}
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}
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}; |