85a98475b0
* Extend mapper 28 (Action 53)'s PRG range from 2mbit to 8mbit "Register" $81 (outer bank, i.e. regs[3]) supports a full 8-bit value for the outer PRG ROM bank, permitting up to 8mbit total space. Currently Mesen only honours the lower 6 bits (probably because some (but not all) hardware implements it that way). This limit lead to some complications when trying to use Mesen to test behaviour vs. actual hardware. Matter was discussed on Discord with jroach and Tepples. * Fixup for 0f9d8a2: missed one line * Fixup for 0f9d8a2: remove WriteRegister mask
94 lines
2.6 KiB
C++
94 lines
2.6 KiB
C++
#pragma once
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#include "stdafx.h"
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#include "BaseMapper.h"
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class Action53 : public BaseMapper
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{
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private:
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uint8_t _selectedReg;
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uint8_t _regs[4];
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uint8_t _mirroringBit;
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protected:
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virtual uint16_t GetPRGPageSize() override { return 0x4000; }
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virtual uint16_t GetCHRPageSize() override { return 0x2000; }
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void InitMapper() override
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{
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_selectedReg = 0;
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memset(_regs, 0, sizeof(_regs));
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AddRegisterRange(0x5000, 0x5FFF, MemoryOperation::Write);
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SelectPRGPage(1, -1);
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}
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void StreamState(bool saving) override
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{
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BaseMapper::StreamState(saving);
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ArrayInfo<uint8_t> regs{ _regs,4 };
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Stream(_selectedReg, _mirroringBit, regs);
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if(!saving) {
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UpdateState();
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}
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}
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void UpdateState()
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{
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uint8_t mirroring = _regs[2] & 0x03;
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if(!(mirroring & 0x02)) {
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mirroring = _mirroringBit;
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}
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switch(mirroring) {
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case 0: SetMirroringType(MirroringType::ScreenAOnly); break;
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case 1: SetMirroringType(MirroringType::ScreenBOnly); break;
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case 2: SetMirroringType(MirroringType::Vertical); break;
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case 3: SetMirroringType(MirroringType::Horizontal); break;
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}
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uint8_t gameSize = (_regs[2] & 0x30) >> 4;
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uint8_t prgSize = (_regs[2] & 0x08) >> 3;
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uint8_t slotSelect = (_regs[2] & 0x04) >> 2;
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uint8_t chrSelect = _regs[0] & 0x03;
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uint8_t prgSelect = _regs[1] & 0x0F;
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uint16_t outerPrgSelect = _regs[3] << 1;
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SelectCHRPage(0, chrSelect);
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if(prgSize) {
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uint8_t bank = (slotSelect ? 0 : 1);
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switch(gameSize) {
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case 0: SelectPRGPage(bank, (outerPrgSelect & 0x1FE) | (prgSelect & 0x01)); break;
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case 1: SelectPRGPage(bank, (outerPrgSelect & 0x1FC) | (prgSelect & 0x03)); break;
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case 2: SelectPRGPage(bank, (outerPrgSelect & 0x1F8) | (prgSelect & 0x07)); break;
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case 3: SelectPRGPage(bank, (outerPrgSelect & 0x1F0) | (prgSelect & 0x0F)); break;
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}
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SelectPRGPage(slotSelect ? 1 : 0, (outerPrgSelect & 0x1FE) | slotSelect);
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} else {
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prgSelect <<= 1;
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uint16_t outerAnd[4]{ 0x1FE, 0x1FC, 0x1F8, 0x1F0 };
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uint8_t innerAnd[4]{ 0x01, 0x03, 0x07, 0x0F };
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SelectPRGPage(0, (outerPrgSelect & outerAnd[gameSize]) | (prgSelect & innerAnd[gameSize]));
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SelectPRGPage(1, (outerPrgSelect & outerAnd[gameSize]) | ((prgSelect | 0x01) & innerAnd[gameSize]));
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}
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}
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void WriteRegister(uint16_t addr, uint8_t value) override
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{
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if(addr <= 0x5FFF) {
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_selectedReg = ((value & 0x80) >> 6) | (value & 0x01);
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} else if(addr >= 0x8000) {
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if(_selectedReg <= 1) {
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_mirroringBit = (value >> 4) & 0x01;
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} else if(_selectedReg == 2) {
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_mirroringBit = (value & 0x01);
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}
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_regs[_selectedReg] = value;
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UpdateState();
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}
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}
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};
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