Fixed some mistakes (mostly in the documentation).
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5 changed files with 60 additions and 53 deletions
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@ -1,15 +1,15 @@
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;
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; PCE definitions. By Groepaz/Hitmem.
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; PCE definitions. By Groepaz/Hitmen.
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;
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; FIXME: screen dimensions my change according to selected video mode
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; FIXME: Screen dimensions can change according to the selected video mode.
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screenrows = (224/8)
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charsperline = 61
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CH_HLINE = 1
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CH_VLINE = 2
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; HuC6270 - Video Display Controller (VDC)
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; HuC6270 -- Video Display Controller (VDC)
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VDC_MAWR = 0 ; Memory Address Write Register
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VDC_MARR = 1 ; Memory Address Read Register
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@ -24,8 +24,8 @@ VDC_BYR = 8 ; Background Y-Scroll Register
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VDC_MWR = 9 ; Memory-access Width Register
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VDC_HSR = 10 ; Horizontal Sync Register
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VDC_HDR = 11 ; Horizontal Display Register
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VDC_VPR = 12 ; Vertical synchronous register
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VDC_VDW = 13 ; Vertical display register
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VDC_VSR = 12 ; Vertical sync Register
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VDC_VDR = 13 ; Vertical Display register
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VDC_VCR = 14 ; Vertical display END position register
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VDC_DCR = 15 ; (DMA) Control Register
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VDC_SOUR = 16 ; (DMA) Source Register
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@ -42,49 +42,49 @@ VDC_CTRL := $0200
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VDC_DATA_LO := $0202
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VDC_DATA_HI := $0203
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; HuC6260 - Video Color Encoder (vce)
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; HuC6260 -- Video Color Encoder (VCE)
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; The DAC has a palette of 512 colours.
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; The bitmap of the palette data is this: 0000000gggrrrbbb.
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; You can read and write the DAC registers.
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VCE = $0400 ; base
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VCE := $0400 ; base
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VCE_CTRL = $0400 ; write $00 to reset
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VCE_ADDR_LO = $0402 ; LSB of byte offset into palette
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VCE_ADDR_HI = $0403 ; MSB of byte offset into palette
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VCE_DATA_LO = $0404 ; LSB of 16-bit palette data
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VCE_DATA_HI = $0405 ; MSB of 16-bit palette data
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VCE_CTRL := $0400 ; write $00 to reset
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VCE_ADDR_LO := $0402 ; LSB of byte offset into palette
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VCE_ADDR_HI := $0403 ; MSB of byte offset into palette
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VCE_DATA_LO := $0404 ; LSB of 16-bit palette data
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VCE_DATA_HI := $0405 ; MSB of 16-bit palette data
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; Programmable Sound Generator (PSG)
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PSG = $0800 ; base
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PSG := $0800 ; base
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PSG_CHAN_SELECT = $0800
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PSG_GLOBAL_PAN = $0801
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PSG_FREQ_LO = $0802
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PSG_FREQ_HI = $0803
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PSG_CHAN_CTRL = $0804
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PSG_CHAN_PAN = $0805
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PSG_CHAN_DATA = $0806
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PSG_NOISE = $0807
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PSG_LFO_FREQ = $0808
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PSG_LFO_CTRL = $0809
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PSG_CHAN_SELECT := $0800
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PSG_GLOBAL_PAN := $0801
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PSG_FREQ_LO := $0802
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PSG_FREQ_HI := $0803
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PSG_CHAN_CTRL := $0804
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PSG_CHAN_PAN := $0805
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PSG_CHAN_DATA := $0806
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PSG_NOISE := $0807
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PSG_LFO_FREQ := $0808
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PSG_LFO_CTRL := $0809
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; Timer
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TIMER = $0C00 ; base
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TIMER := $0C00 ; base
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TIMER_COUNT = $0C00
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TIMER_CTRL = $0C01
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TIMER_COUNT := $0C00
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TIMER_CTRL := $0C01
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JOY_CTRL = $1000
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JOY_CTRL := $1000
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IRQ_MASK = $1402
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IRQ_STATUS = $1403
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IRQ_MASK := $1402
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IRQ_STATUS := $1403
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CDR_MEM_DISABLE = $1803
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CDR_MEM_ENABLE = $1807
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CDR_MEM_DISABLE := $1803
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CDR_MEM_ENABLE := $1807
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; Write VDC register
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.macro VREG arg1,arg2
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@ -159,7 +159,7 @@
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Topics specific to the Ohio Scientific machines.
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<tag><htmlurl url="pce.html" name="pce.html"></tag>
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Topics specific to NEC PC-Engine (TurboGrafx) Console.
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Topics specific to the NEC PC-Engine (TurboGrafx-16) Console.
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<tag><htmlurl url="pet.html" name="pet.html"></tag>
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Topics specific to the Commodore PET machines.
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45
doc/pce.sgml
45
doc/pce.sgml
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@ -63,27 +63,37 @@ actually see when they execute the code in that cartridge.
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<sect>Memory layout<p>
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cc65-generated programs with the default setup run with the I/O area and a
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CHR bank enabled, which gives a usable memory range of $8000 - $FFF3.
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All boot ROM entry points may be called directly without additional code.
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cc65-generated programs with the default setup run with the memory map that was
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used by many PC-Engine games:
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<itemize>
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<item>The first 8K bytes is the I/O area.
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<item>The second 8K bytes is RAM, which holds
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<itemize>
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<item>the redirected zero-page and the redirected hardware stack page,
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<item>and 7680 bytes of general memory ($2200 - $3FFF).
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</itemize>
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<item>The last 8K bytes in the usual 64K-byte range is the ROM that holds the
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program.
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</itemize>
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Special locations:
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<descrip>
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<tag/Text screen and Font/
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The text screen is located at VRAM $0000;
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the Font is located at VRAM $2000.
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The text screen is located at Video RAM (VRAM) address $0000;
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the Font is located at VRAM address $2000.
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<tag/Stack/
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The C runtime stack is located in system RAM at $3FFF; and, grows downwards.
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The C run-time stack is located in system RAM at $3FFF;
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and, grows downwards.
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<tag/Data and BSS/
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The Data (initialized variables) and BSS (uninitialized variables) sections are
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placed one after the other into system RAM at $2200.
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<tag/Heap/
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The C heap is located after the end of the BSS section; and, grows towards the C
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runtime stack.
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The C heap is located after the end of the BSS section;
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and, extends up to the C run-time stack.
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<tag/Code/
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In an 8K ROM cartridge, code and read-only data are located between
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@ -94,7 +104,7 @@ Special locations:
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In a 32K cartridge, code and read-only data are located between $8000
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and $FFF5.
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</descrip><p>
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</descrip>
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@ -113,21 +123,22 @@ Programs containing PCE-specific code may use the <tt/pce.h/ header file.
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<sect1>Hardware access<p>
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The following pseudo variables, declared in the <tt/pce.inc/ include file, do
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The following constants, defined in the <tt/pce.inc/ include file, do
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allow access to hardware that is located in the address space.
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<descrip>
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<tag><tt/PSG/</tag>
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The <tt/PSG/ defines allow access to the PSG chip (Programmable Sound Generator).
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The <tt/PSG/ defines allow access to the PSG (Programmable Sound Generator).
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<tag><tt/VCE/</tag>
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The <tt/VCE/ defines allow access to the VCE chip (Video Color Encoder).
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<tag><tt/VDC/</tag>
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The <tt/VDC/ defines allow access to the VDC chip (Video Display Controller).
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The <tt/VDC/ defines allow access to the VDC chip (Video Display Controller).<newline>
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32K of 16-bit words of Video RAM can be accessed only through this chip.
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</descrip><p>
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</descrip>
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@ -156,7 +167,7 @@ No extended memory drivers are currently available for the PCE.
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Note that the Japanese 6-button pad currently is not supported.
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</descrip><p>
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</descrip>
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<sect1>Mouse drivers<p>
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@ -172,17 +183,13 @@ No serial drivers are currently available for the PCE.
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<sect>Limitations<p>
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<itemize>
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<item>interruptor support in crt0 (and cfg) is missing
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</itemize>
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<sect1>Disk I/O<p>
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The existing library for the PCE doesn't implement C file
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I/O. There are no hacks for the <tt/read()/ and <tt/write()/ routines.
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To be more concrete, this limitation means that you cannot use any of the
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To be more concrete, that limitation means that you cannot use any of the
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following functions (and a few others):
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<itemize>
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@ -14,7 +14,7 @@
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; of functions. Doing it by a table means some overhead in space, but it
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; has major advantages:
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;
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; * It is fast. If it were'nt for the slow parameter passing of cc65, one
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; * It is fast. If it weren't for the slow parameter passing of cc65, one
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; could even define macros for the isxxx functions (this is usually
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; done on other platforms).
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;
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@ -4,7 +4,7 @@
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.include "extzp.inc"
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ticktock:
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bbr5 vdc_flags,@s1 ; not vertical-blank interrupt
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bbr5 vdc_flags,@s1 ; skip if not vertical-blank interrupt
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; Increment the system tick counter.
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inc tickcount
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