Fix MSU-1 bug where write to MSU1BASE+4 is mirred to MSUBASE+5
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1 changed files with 1 additions and 1 deletions
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@ -107,7 +107,7 @@ void MSU1::mmio_write(unsigned addr, uint8 data) {
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if(datafile.open()) datafile.seek(mmio.data_offset);
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mmio.data_busy = false;
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break;
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case 4: mmio.audio_track = (mmio.audio_track & 0xff00) | (data << 0);
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case 4: mmio.audio_track = (mmio.audio_track & 0xff00) | (data << 0); break;
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case 5: mmio.audio_track = (mmio.audio_track & 0x00ff) | (data << 8);
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if(audiofile.open()) audiofile.close();
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if(audiofile.open(interface->path(Cartridge::Slot::Base, { "-", (unsigned)mmio.audio_track, ".pcm" }), file::mode::read)) {
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