empathicqubit/Mesen-SX
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions
971 commits 3 branches 4 tags 18 MiB
Commit graph

52 commits

Author SHA1 Message Date
NovaSquirrel
c0e249e993 Revert "Merge branch 'reformat_code'" 
This reverts commit daf3b57e89, reversing
changes made to 7a6e0b7d77.
 2021-03-10 11:13:28 -05:00
Vladimir Kononovich
3764af908f Reformat Core (Resharper) 2020-12-19 23:30:09 +03:00
Vladimir Kononovich
320371740d Added api for getting breakpoints and cpu flags. 2020-11-01 16:52:30 +03:00
Vladimir Kononovich
eb1006704a Implemented CPU flags changing. 2020-10-12 18:19:46 +03:00
Vladimir Kononovich
7a75651541 Fixes to registers change core. 2020-10-12 16:49:10 +03:00
Vladimir Kononovich
f514335bde Registers change APIs. 2020-10-11 13:57:01 +03:00
Sour
1d6253d2e5 SA-1: Fixed SA-1 vector logic 
Reads done by the code should return the values at the read address, rather than returning the vector register value (fixes Gradius/Contra 3 SA-1 romhacks that are known to work on hardware)
 2020-03-01 18:24:24 -05:00
Sour
28443f84d6 Debugger: Fixed display issues in disassembly view for SA-1 debugger 
Effective addresses and their values were incorrect
 2020-02-27 19:59:41 -05:00
Sour
0ed96a0432 IRQ: Tweaked IRQ/WAI timings 
+ Check enabled hdma channels on dot 276 (rather than the CPU cycle following dot 276)
Fixes Full Throttle & ASP graphical issues
Also gets hdmaen_latch tests closer to what they should be
(Unsure if this is accurate or not, though)
 2020-01-18 13:12:15 -05:00
Sour
73c1a90833 NMI/IRQ: Fixes and refactoring to attempt to better represent the hardware 
Fixes Power Rangers - The Fighting Edition having partially corrupted graphics during fights
 2019-12-05 22:13:39 -05:00
Sour
fe470dd87a SA-1 support (still missing a few rarely used features) 2019-07-25 22:22:09 -04:00
Sour
d46c8c3fa4 Refactored master clock code to improve performance 2019-07-12 23:55:18 -04:00
Sour
3f4a72a338 CPU: Reset D & DBR to 0 on reset (fixes SG&G freeze on reset) 
+ Generally fix reset behavior for the 65816 based on available info
 2019-07-08 22:03:58 -04:00
Sour
5d79229f3a CPU: Added cycle-by-cycle emulation for mul & div registers 2019-07-06 09:29:35 -04:00
Sour
2927939a56 DMA: Implemented cpu cycle that skips the IRQ/NMI check after DMA 2019-07-05 19:18:30 -04:00
Sour
66c3d0a3b1 CPU: Fixed pre/post-DMA timings when writing to $420B 
i.e: read next opcode pre-DMA, finish that instruction post-DMA
 2019-06-30 19:47:12 -04:00
Sour
a36a09df32 CPU: Fixed timing issues with some instructions 2019-06-30 12:36:15 -04:00
Sour
e0e39957a5 Debugger: Fixed deadlock when loading another game with the debugger opened 2019-05-04 09:25:10 -04:00
Sour
984b1be481 Timing improvements (DMA, HDMA, DRAM refresh, CPU cycles) 2019-04-20 14:17:32 -04:00
Sour
11937c1ac3 IRQ: Improved IRQ logic (passes demo_irqtest) 2019-04-14 15:22:34 -04:00
Sour
8dee056dda DMA: Improved DMA/HDMA timing 
Wait 1 cpu cycle before starting then sync to the next multiple of 8 and sync back to a multiple of a CPU cycle before stopping
 2019-04-11 22:34:28 -04:00
Sour
d89f4ba0cb Debugger: SPC debugger/breakpoints/call stack 2019-04-07 12:25:14 -04:00
Sour
407f72aafc Debugger: Prevent debugger tools from affecting the dma nmi/irq delay flag 2019-04-06 09:14:49 -04:00
Sour
260e0f089d DMA: Implement NMI/IRQ handler delay after DMA/HDMA 2019-04-04 17:49:47 -04:00
Sour
0e26e5317d Debugger: Step into, step over, run ppu cycle/scanline/frame (+ call stack fixes) 2019-03-24 16:42:52 -04:00
Sour
ebfd42f5b6 CPU: Improve timings for WAI instruction (?) 2019-03-22 21:37:32 -04:00
Sour
63f6de6a8e Core: Reset/Power Cycle support (+ fixed power on state for DMA controller) 2019-03-16 12:20:18 -04:00
Sour
73913e1f0c Save state support 2019-03-12 09:15:57 -04:00
Sour
98d72d55b5 Debugger: Added some values to the expression evaluator 2019-03-09 16:03:48 -05:00
Sour
f0ce0f63af CPU: Improve implementation of STP/WAI instructions 2019-03-09 11:57:15 -05:00
Sour
ae2cec058a CPU: Fixed regression - SP was initialized to the wrong value 2019-03-08 17:10:03 -05:00
Sour
e5698ae7c5 CPU: Prevent out-of-bounds memory access on writes 2019-03-08 17:08:45 -05:00
Sour
7211eece7c CPU/PPU: Improved timings 2019-03-08 10:27:16 -05:00
Sour
0ada7f9d2f Debugger: Added Event Viewer 2019-03-07 20:12:32 -05:00
Sour
4139f6dca8 CPU/PPU: Improved timing and implemented catch-up in PPU when registers are written to in the middle of a scanline 2019-03-04 17:49:14 -05:00
Sour
25837e5c71 CPU: Fixed BRK/COP instructions (read + ignore the signature byte) 2019-03-02 20:26:14 -05:00
Sour
c9eb9cef52 Debugger: Show effective address/memory value in disassembly + update trace logger to use the same code 2019-02-28 16:53:04 -05:00
Sour
02425d7453 DMA: Added delay values for DMA/HDMA 2019-02-21 23:35:51 -05:00
Sour
0b7ad7c0db CPU: Added all idle cycles + added DRAM refresh delay 2019-02-21 22:10:41 -05:00
Sour
97c7d06156 Fixed throw syntax 2019-02-21 18:18:25 -05:00
Sour
e6809305f1 CPU: Enabling 8-bit indexes must truncate the value of X/Y (refix) 2019-02-20 22:46:14 -05:00
Sour
fb8a9f18ed CPU: Fixed ClearIrqSource setting the irq instead of clearing it 
A lot more games booting and getting in-game now
 2019-02-20 20:50:43 -05:00
Sour
aaf147b53b Refactor internal CPU registers + implement division register 2019-02-17 15:37:31 -05:00
Sour
0757ccefa6 PPU: Horizontal/vertical IRQ timer support 2019-02-17 01:09:47 -05:00
Sour
829f4e23c9 CPU: Fixed NMI logic/vector & JML instruction ($5C) 2019-02-15 00:09:46 -05:00
Sour
b33380a95e CPU: Fixed bugs with PEA/PEI/PER 2019-02-14 19:00:17 -05:00
Sour
0f64559882 CPU: Fixed issues with OR/EOR/AND and stack addressing mode 2019-02-14 00:48:16 -05:00
Sour
ca95636c37 CPU addressing review/fixes, trace logger improvements 2019-02-13 18:44:12 -05:00
Sour
522372a365 Fixed addressing bugs, added PPU stub, improved trace logger output, split CPU instructions to another file 2019-02-13 13:32:51 -05:00
Sour
5c19584019 Imported some code from Mesen (video, audio, UI, etc.) + basic trace logger/step functionality 2019-02-12 22:13:09 -05:00