NovaSquirrel
c0e249e993
Revert "Merge branch 'reformat_code'"
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This reverts commit daf3b57e897a6e0b7d77
2021-03-10 11:13:28 -05:00
Vladimir Kononovich
3764af908f
Reformat Core (Resharper)
2020-12-19 23:30:09 +03:00
Vladimir Kononovich
f514335bde
Registers change APIs.
2020-10-11 13:57:01 +03:00
Sour
d204485153
Added Super Game Boy support
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Missing support for SGB2's timings and still needs a few tweaks and more testing
2020-06-18 00:58:39 -04:00
Sour
e6a483c525
SA1: Fixed crash when loading SA1 games with no SRAM
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+ If battery flag is set but sram size is 0, backup IRAM instead
2020-06-03 20:37:36 -04:00
Sour
7c79bf2974
Debugger: Added SA-1 tab to register viewer
2020-03-02 23:08:28 -05:00
Sour
1d6253d2e5
SA-1: Fixed SA-1 vector logic
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Reads done by the code should return the values at the read address, rather than returning the vector register value (fixes Gradius/Contra 3 SA-1 romhacks that are known to work on hardware)
2020-03-01 18:24:24 -05:00
Sour
2e8a13e920
Debugger: Added DSP debugger
2020-02-23 22:24:58 -05:00
Sour
234c494c3e
Debugger: SA1 - Fixed display for BWRAM
2019-12-08 13:05:59 -05:00
Sour
4a7e6df39b
SA-1: Implemented bitmap mode for BWRAM
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Fixes SMRPG's level up screen
2019-12-08 11:28:38 -05:00
Sour
67b286a16f
SA1: Improved timings (bus conflicts, etc.)
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-Fixed I-RAM access speed while main CPU is DMAing to I-RAM
-Fixed missing extra cycle on BRL
-Fixed idle SA-1 cycles (incorrectly) taking more than 1 cycle during bus conflicts
-Fixed branch instructions to apply cycle penalties based on the destination address' type (rather than the source address)
2019-11-25 21:01:21 -05:00
Sour
efe157cfcb
SA-1: Added variable bit length data support
2019-08-09 00:04:01 -04:00
Sour
22d4f58eae
SA-1: Add support for both character conversion types
2019-08-08 23:05:24 -04:00
Sour
33cee67e61
Added GSU (Super FX) support
2019-07-30 22:43:32 -04:00
Sour
fe470dd87a
SA-1 support (still missing a few rarely used features)
2019-07-25 22:22:09 -04:00
