Sour
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97c7d06156
|
Fixed throw syntax
|
2019-02-21 18:18:25 -05:00 |
|
Sour
|
170a33af49
|
CPU: Implemented FastROM register
|
2019-02-21 18:12:44 -05:00 |
|
Sour
|
bcf41aca83
|
PPU: Implemented second PPU status flag ($213F)
|
2019-02-21 18:11:31 -05:00 |
|
Sour
|
93b730b390
|
PPU: Fixed V/H read toggle
|
2019-02-21 17:45:11 -05:00 |
|
Sour
|
66aa5034a0
|
Core: Added frame limiter
|
2019-02-21 17:18:56 -05:00 |
|
Sour
|
b2af226467
|
Code optimization
|
2019-02-21 17:17:55 -05:00 |
|
Sour
|
a71de2a7bf
|
SPC: Run SPC 1 frame per frame, rather than 60 frames per frame.
+ Fixed warnings in SPC code in 64-bit mode
|
2019-02-21 16:49:19 -05:00 |
|
Sour
|
d73ca5bf82
|
PPU: Implemented multiply register
|
2019-02-21 08:15:00 -05:00 |
|
Sour
|
5952fcd3f5
|
DMA: Implemented DMA register reads
|
2019-02-21 07:55:53 -05:00 |
|
Sour
|
68e7617c95
|
PPU: Implemented VRAM/CGRAM reads + H/V offset data latches
+ Implemented work ram read register
|
2019-02-21 07:27:47 -05:00 |
|
Sour
|
6e32ebfffd
|
CPU: MVN/MVP set the value of DBR to the destination bank
|
2019-02-21 00:40:32 -05:00 |
|
Sour
|
e6809305f1
|
CPU: Enabling 8-bit indexes must truncate the value of X/Y (refix)
|
2019-02-20 22:46:14 -05:00 |
|
Sour
|
1a90a36d3c
|
CPU: TSC/TDC/TCD always transfer a full 16-bit
|
2019-02-20 22:01:04 -05:00 |
|
Sour
|
fb8a9f18ed
|
CPU: Fixed ClearIrqSource setting the irq instead of clearing it
A lot more games booting and getting in-game now
|
2019-02-20 20:50:43 -05:00 |
|
Sour
|
0b757f6fad
|
CPU: Fixed MVN/MVP when A is $FFFF
|
2019-02-20 20:16:11 -05:00 |
|
Sour
|
f75db1b297
|
CPU: Fixed MVN/MVP instructions using the wrong src/dest banks
|
2019-02-20 20:00:59 -05:00 |
|
Sour
|
011caf951c
|
CPU: Enabling 8-bit indexes must truncate the value of X/Y
|
2019-02-20 19:53:45 -05:00 |
|
Sour
|
37b501122f
|
PPU: Mosaic effect support
|
2019-02-20 17:39:14 -05:00 |
|
Sour
|
30cb4f1dcc
|
PPU: Fixed out-of-bounds memory writes
|
2019-02-20 00:43:40 -05:00 |
|
Sour
|
77ac5a50dc
|
PPU: Minor refactoring
|
2019-02-19 23:37:27 -05:00 |
|
Sour
|
de9e71eabf
|
PPU: Improved color math support
|
2019-02-19 23:35:43 -05:00 |
|
Sour
|
4264779b26
|
PPU: Fixed palette selection for BG2/3/4 in mode 0
|
2019-02-19 22:44:05 -05:00 |
|
Sour
|
221bc44700
|
DMA: Added support for HDMA (incorrect timings)
|
2019-02-19 21:09:12 -05:00 |
|
Sour
|
384a5a2c99
|
PPU: Implement OAM reading and fixed OAM-related bugs (based on blargg's oam tests)
|
2019-02-19 18:41:59 -05:00 |
|
Sour
|
b5fe44a037
|
PPU: Implement basic sprite time/range over flags, forced vblank flag
+ Stub for IO port registers
|
2019-02-19 18:01:27 -05:00 |
|
Sour
|
06a9babfd7
|
PPU: Basic scroll offset support (WIP)
|
2019-02-19 17:23:21 -05:00 |
|
Sour
|
d88a0b5086
|
PPU: Scanline renderer (wip) - better priority & subscreen/color math logic
|
2019-02-19 01:26:48 -05:00 |
|
Sour
|
ad251609d6
|
CPU: Fixed ADC/SBC instructions (passes blargg's adc/sbc tests)
|
2019-02-18 23:04:08 -05:00 |
|
Sour
|
9f5bf4a37b
|
PPU: Scanline renderer (wip)
|
2019-02-18 22:27:22 -05:00 |
|
Sour
|
eb158131a5
|
CPU: MSB of accumulator should not be modified by shift operations when 8-bit memory operations are enabled
|
2019-02-18 20:24:17 -05:00 |
|
Sour
|
2275718c93
|
PPU: Basic tile mirroring support + color math half mode fix
|
2019-02-18 00:24:46 -05:00 |
|
Sour
|
17bb339fec
|
PPU: Very incomplete color math support
|
2019-02-17 23:53:19 -05:00 |
|
Sour
|
7ccfc99a62
|
PPU: Fixed tile CHR address for layers 1/3 + implemented "layer/oam enabled" flag
|
2019-02-17 23:26:49 -05:00 |
|
Sour
|
20059ae975
|
PPU: Basic support for rendering sprites
|
2019-02-17 22:44:57 -05:00 |
|
Sour
|
a19013da76
|
PPU: Implemented OAM writes
|
2019-02-17 21:09:33 -05:00 |
|
Sour
|
2305900939
|
Fixed compilation error in debug build
|
2019-02-17 21:08:43 -05:00 |
|
Sour
|
b806b3d96e
|
Core: Added SNES controller support
|
2019-02-17 20:29:29 -05:00 |
|
Sour
|
aaf147b53b
|
Refactor internal CPU registers + implement division register
|
2019-02-17 15:37:31 -05:00 |
|
Sour
|
1224909fb1
|
UI: Added frame/fps counters
|
2019-02-17 15:02:33 -05:00 |
|
Sour
|
d12a582dbc
|
SPC: Switched to fast DSP core (better for development for now)
|
2019-02-17 14:58:48 -05:00 |
|
Sour
|
93e8fd9d5e
|
Core: Fixed for memory mappings, implemented multiplication register, added logging to help debugging missing functionalities
|
2019-02-17 14:42:35 -05:00 |
|
Sour
|
0757ccefa6
|
PPU: Horizontal/vertical IRQ timer support
|
2019-02-17 01:09:47 -05:00 |
|
Sour
|
0681419841
|
PPU: Added very basic support for other display modes
|
2019-02-17 00:32:41 -05:00 |
|
Sour
|
bdc57286e7
|
SPC: Integrate blargg's SPC emulation library
Sound still doesn't work, however.
|
2019-02-16 11:23:01 -05:00 |
|
Sour
|
645cce2d47
|
PPU: Fixed broken vram data register
|
2019-02-16 10:24:43 -05:00 |
|
Sour
|
4bea25ecc7
|
Debugger: Break and open trace logger on BRK instruction
|
2019-02-16 08:10:08 -05:00 |
|
Sour
|
fa36f36314
|
PPU: Fixed out-of-bounds memory accesses due to vram/cgram pointers not wrapping
|
2019-02-16 08:08:16 -05:00 |
|
Sour
|
da2d93aaed
|
DMA: Fixed infinite loop in transfer mode 7
|
2019-02-16 08:07:38 -05:00 |
|
Sour
|
691175aaaa
|
Stop and cleanup properly when closing application (to fix crash)
|
2019-02-16 01:22:31 -05:00 |
|
Sour
|
e257db4def
|
Fixed memory leaks
|
2019-02-16 01:16:57 -05:00 |
|