Sour
|
8dee056dda
|
DMA: Improved DMA/HDMA timing
Wait 1 cpu cycle before starting then sync to the next multiple of 8 and sync back to a multiple of a CPU cycle before stopping
|
2019-04-11 22:34:28 -04:00 |
|
Sour
|
7bb0910607
|
HDMA: Set DoTransfer flag to true for all 8 HDMA channels during init if at least 1 HDMA channel is active (Fixed "Ladida_lol" test)
|
2019-04-11 20:08:19 -04:00 |
|
Sour
|
260e0f089d
|
DMA: Implement NMI/IRQ handler delay after DMA/HDMA
|
2019-04-04 17:49:47 -04:00 |
|
Sour
|
e1c7e7b9c4
|
Linux: Fixed build/makefile and compilation errors/warnings (and add missing files to git)
|
2019-03-31 14:50:12 -04:00 |
|
Sour
|
53de61ba90
|
HDMA: Fixed timings on HDMA initalization (and fixed regression that caused DRAM refresh to not longer occur)
|
2019-03-26 19:07:06 -04:00 |
|
Sour
|
664c984a9d
|
HDMA: Decrement flag is ignored for HDMA transfers
|
2019-03-25 18:29:37 -04:00 |
|
Sour
|
273403676a
|
HDMA: No overhead for HDMA if all channels are disabled (?)
|
2019-03-22 21:37:31 -04:00 |
|
Sour
|
bb0c8b1f10
|
DMA: Fix behavior when trying to write to B bus registers using the A bus (and when trying to read/write DMA registers using DMA) + fixed DMA wrapping when it reaches the end of a bank
|
2019-03-16 16:36:58 -04:00 |
|
Sour
|
63f6de6a8e
|
Core: Reset/Power Cycle support (+ fixed power on state for DMA controller)
|
2019-03-16 12:20:18 -04:00 |
|
Sour
|
73913e1f0c
|
Save state support
|
2019-03-12 09:15:57 -04:00 |
|
Sour
|
a018f1129a
|
DMA: Restrict $2080<->WRAM DMA behavior based on tests
|
2019-03-09 14:27:32 -05:00 |
|
Sour
|
2cecde26fb
|
DMA: HDMA init/run must interrupt/cancel regular DMA
|
2019-03-09 12:01:36 -05:00 |
|
Sour
|
7211eece7c
|
CPU/PPU: Improved timings
|
2019-03-08 10:27:16 -05:00 |
|
Sour
|
0218d57de7
|
HDMA: FixedTransfer flag does not affect HDMA
|
2019-03-04 19:46:08 -05:00 |
|
Sour
|
b9321f66f7
|
DMA: Reset DoTransfer flag when initializing HDMA channels
|
2019-03-03 13:53:00 -05:00 |
|
Sour
|
c809f096f5
|
HDMA: Fixed HDMA only working until any channel was disabled/done
|
2019-02-22 22:15:45 -05:00 |
|
Sour
|
b6b1620e00
|
DMA: Fixed (?) source bank for HDMA
|
2019-02-22 18:40:39 -05:00 |
|
Sour
|
02425d7453
|
DMA: Added delay values for DMA/HDMA
|
2019-02-21 23:35:51 -05:00 |
|
Sour
|
5952fcd3f5
|
DMA: Implemented DMA register reads
|
2019-02-21 07:55:53 -05:00 |
|
Sour
|
221bc44700
|
DMA: Added support for HDMA (incorrect timings)
|
2019-02-19 21:09:12 -05:00 |
|
Sour
|
93e8fd9d5e
|
Core: Fixed for memory mappings, implemented multiplication register, added logging to help debugging missing functionalities
|
2019-02-17 14:42:35 -05:00 |
|
Sour
|
e257db4def
|
Fixed memory leaks
|
2019-02-16 01:16:57 -05:00 |
|
Sour
|
85c84146bf
|
DMA: Implemented all dma transfer modes
|
2019-02-16 00:47:02 -05:00 |
|
Sour
|
0f657ccf63
|
DMA: Refactoring + improvements/fixes
|
2019-02-15 00:08:50 -05:00 |
|