Sour
|
66c3d0a3b1
|
CPU: Fixed pre/post-DMA timings when writing to $420B
i.e: read next opcode pre-DMA, finish that instruction post-DMA
|
2019-06-30 19:47:12 -04:00 |
|
Sour
|
a36a09df32
|
CPU: Fixed timing issues with some instructions
|
2019-06-30 12:36:15 -04:00 |
|
Sour
|
e0e39957a5
|
Debugger: Fixed deadlock when loading another game with the debugger opened
|
2019-05-04 09:25:10 -04:00 |
|
Sour
|
984b1be481
|
Timing improvements (DMA, HDMA, DRAM refresh, CPU cycles)
|
2019-04-20 14:17:32 -04:00 |
|
Sour
|
11937c1ac3
|
IRQ: Improved IRQ logic (passes demo_irqtest)
|
2019-04-14 15:22:34 -04:00 |
|
Sour
|
8dee056dda
|
DMA: Improved DMA/HDMA timing
Wait 1 cpu cycle before starting then sync to the next multiple of 8 and sync back to a multiple of a CPU cycle before stopping
|
2019-04-11 22:34:28 -04:00 |
|
Sour
|
d89f4ba0cb
|
Debugger: SPC debugger/breakpoints/call stack
|
2019-04-07 12:25:14 -04:00 |
|
Sour
|
407f72aafc
|
Debugger: Prevent debugger tools from affecting the dma nmi/irq delay flag
|
2019-04-06 09:14:49 -04:00 |
|
Sour
|
260e0f089d
|
DMA: Implement NMI/IRQ handler delay after DMA/HDMA
|
2019-04-04 17:49:47 -04:00 |
|
Sour
|
0e26e5317d
|
Debugger: Step into, step over, run ppu cycle/scanline/frame (+ call stack fixes)
|
2019-03-24 16:42:52 -04:00 |
|
Sour
|
ebfd42f5b6
|
CPU: Improve timings for WAI instruction (?)
|
2019-03-22 21:37:32 -04:00 |
|
Sour
|
63f6de6a8e
|
Core: Reset/Power Cycle support (+ fixed power on state for DMA controller)
|
2019-03-16 12:20:18 -04:00 |
|
Sour
|
73913e1f0c
|
Save state support
|
2019-03-12 09:15:57 -04:00 |
|
Sour
|
98d72d55b5
|
Debugger: Added some values to the expression evaluator
|
2019-03-09 16:03:48 -05:00 |
|
Sour
|
f0ce0f63af
|
CPU: Improve implementation of STP/WAI instructions
|
2019-03-09 11:57:15 -05:00 |
|
Sour
|
ae2cec058a
|
CPU: Fixed regression - SP was initialized to the wrong value
|
2019-03-08 17:10:03 -05:00 |
|
Sour
|
e5698ae7c5
|
CPU: Prevent out-of-bounds memory access on writes
|
2019-03-08 17:08:45 -05:00 |
|
Sour
|
7211eece7c
|
CPU/PPU: Improved timings
|
2019-03-08 10:27:16 -05:00 |
|
Sour
|
0ada7f9d2f
|
Debugger: Added Event Viewer
|
2019-03-07 20:12:32 -05:00 |
|
Sour
|
4139f6dca8
|
CPU/PPU: Improved timing and implemented catch-up in PPU when registers are written to in the middle of a scanline
|
2019-03-04 17:49:14 -05:00 |
|
Sour
|
25837e5c71
|
CPU: Fixed BRK/COP instructions (read + ignore the signature byte)
|
2019-03-02 20:26:14 -05:00 |
|
Sour
|
c9eb9cef52
|
Debugger: Show effective address/memory value in disassembly + update trace logger to use the same code
|
2019-02-28 16:53:04 -05:00 |
|
Sour
|
02425d7453
|
DMA: Added delay values for DMA/HDMA
|
2019-02-21 23:35:51 -05:00 |
|
Sour
|
0b7ad7c0db
|
CPU: Added all idle cycles + added DRAM refresh delay
|
2019-02-21 22:10:41 -05:00 |
|
Sour
|
97c7d06156
|
Fixed throw syntax
|
2019-02-21 18:18:25 -05:00 |
|
Sour
|
e6809305f1
|
CPU: Enabling 8-bit indexes must truncate the value of X/Y (refix)
|
2019-02-20 22:46:14 -05:00 |
|
Sour
|
fb8a9f18ed
|
CPU: Fixed ClearIrqSource setting the irq instead of clearing it
A lot more games booting and getting in-game now
|
2019-02-20 20:50:43 -05:00 |
|
Sour
|
aaf147b53b
|
Refactor internal CPU registers + implement division register
|
2019-02-17 15:37:31 -05:00 |
|
Sour
|
0757ccefa6
|
PPU: Horizontal/vertical IRQ timer support
|
2019-02-17 01:09:47 -05:00 |
|
Sour
|
829f4e23c9
|
CPU: Fixed NMI logic/vector & JML instruction ($5C)
|
2019-02-15 00:09:46 -05:00 |
|
Sour
|
b33380a95e
|
CPU: Fixed bugs with PEA/PEI/PER
|
2019-02-14 19:00:17 -05:00 |
|
Sour
|
0f64559882
|
CPU: Fixed issues with OR/EOR/AND and stack addressing mode
|
2019-02-14 00:48:16 -05:00 |
|
Sour
|
ca95636c37
|
CPU addressing review/fixes, trace logger improvements
|
2019-02-13 18:44:12 -05:00 |
|
Sour
|
522372a365
|
Fixed addressing bugs, added PPU stub, improved trace logger output, split CPU instructions to another file
|
2019-02-13 13:32:51 -05:00 |
|
Sour
|
5c19584019
|
Imported some code from Mesen (video, audio, UI, etc.) + basic trace logger/step functionality
|
2019-02-12 22:13:09 -05:00 |
|
Sour
|
5e7eebe078
|
CPU: Fixed immediate more 8-bit vs 16-bit logic
+ Added bare minimum logic to load a rom and start executing it
|
2019-02-11 22:41:34 -05:00 |
|
Sour
|
8ad76f6c31
|
65816 core working in 6502 emulation mode
|
2019-02-11 19:18:47 -05:00 |
|