Sour
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ad251609d6
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CPU: Fixed ADC/SBC instructions (passes blargg's adc/sbc tests)
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2019-02-18 23:04:08 -05:00 |
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Sour
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eb158131a5
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CPU: MSB of accumulator should not be modified by shift operations when 8-bit memory operations are enabled
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2019-02-18 20:24:17 -05:00 |
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Sour
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0757ccefa6
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PPU: Horizontal/vertical IRQ timer support
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2019-02-17 01:09:47 -05:00 |
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Sour
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829f4e23c9
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CPU: Fixed NMI logic/vector & JML instruction ($5C)
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2019-02-15 00:09:46 -05:00 |
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Sour
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574a9a6a69
|
CPU: Implemented MVN/MVP
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2019-02-14 20:11:21 -05:00 |
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Sour
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b33380a95e
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CPU: Fixed bugs with PEA/PEI/PER
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2019-02-14 19:00:17 -05:00 |
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Sour
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f979d31971
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CPU: Implement TRB/TSB instructions
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2019-02-14 07:08:46 -05:00 |
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Sour
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3cf0b0e46d
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CPU: BIT with immediate addressing should not alter V/N flags
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2019-02-14 00:49:34 -05:00 |
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Sour
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0f64559882
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CPU: Fixed issues with OR/EOR/AND and stack addressing mode
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2019-02-14 00:48:16 -05:00 |
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Sour
|
930f504861
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CPU: Fixed transfer instructions (based on CPUTRN test rom)
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2019-02-13 23:41:00 -05:00 |
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Sour
|
82010a792f
|
Fixed PHB and XCE instructions
|
2019-02-13 13:33:10 -05:00 |
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Sour
|
522372a365
|
Fixed addressing bugs, added PPU stub, improved trace logger output, split CPU instructions to another file
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2019-02-13 13:32:51 -05:00 |
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