MMC5 - Fixed a few bugs
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parent
199e1f1527
commit
ad085f1a75
2 changed files with 18 additions and 6 deletions
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@ -410,6 +410,8 @@ class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificat
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return ReadRegister(addr);
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} else if(_prgPageAccessType[addr >> 8] & MemoryAccessType::Read) {
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return _prgPages[addr >> 8][addr & 0xFF];
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} else {
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//assert(false);
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}
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return 0;
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}
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@ -420,6 +422,8 @@ class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificat
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WriteRegister(addr, value);
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} else if(_prgPageAccessType[addr >> 8] & MemoryAccessType::Write) {
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_prgPages[addr >> 8][addr & 0xFF] = value;
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} else {
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//assert(false);
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}
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}
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@ -427,6 +431,8 @@ class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificat
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{
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if(_chrPageAccessType[addr >> 8] & MemoryAccessType::Read) {
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return _chrPages[addr >> 8][addr & 0xFF];
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} else {
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//assert(false);
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}
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return 0;
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}
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@ -435,6 +441,8 @@ class BaseMapper : public IMemoryHandler, public Snapshotable, public INotificat
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{
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if(_chrPageAccessType[addr >> 8] & MemoryAccessType::Write) {
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_chrPages[addr >> 8][addr & 0xFF] = value;
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} else {
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//assert(false);
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}
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}
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16
Core/MMC5.h
16
Core/MMC5.h
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@ -64,8 +64,8 @@ private:
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if((((bankNumber & 0x80) == 0x00) && reg != 0x04) || reg == 0x00) {
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bankNumber &= 0x07;
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memoryType = PrgMemoryType::SaveRam;
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uint8_t accessType = MemoryAccessType::Read;
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if(_prgRamProtect1 == 0x10 && _prgRamProtect2 == 0x01) {
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accessType = MemoryAccessType::Read;
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if(_prgRamProtect1 == 0x02 && _prgRamProtect2 == 0x01) {
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accessType |= MemoryAccessType::Write;
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}
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} else {
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@ -246,7 +246,7 @@ private:
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protected:
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virtual uint16_t GetPRGPageSize() { return 0x2000; }
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virtual uint16_t GetCHRPageSize() { return 0x400; }
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virtual uint16_t RegisterStartAddress() { return 0x5100; }
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virtual uint16_t RegisterStartAddress() { return 0x5000; }
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virtual uint16_t RegisterEndAddress() { return 0x5206; }
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virtual uint32_t GetSaveRamSize() { return 0x10000; } //Emulate as if a single 64k block of saved ram existed
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virtual uint32_t GetSaveRamPageSize() { return 0x2000; }
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@ -312,9 +312,13 @@ protected:
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virtual void WriteRAM(uint16_t addr, uint8_t value)
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{
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if(_ppuInFrame && addr >= 0x5C00 && addr <= 0x5FFF && _extendedRamMode <= 1) {
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//Mode 0/1 - Not readable (returns open bus), can only be written while the PPU is rendering (otherwise, 0 is written)
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value = 0;
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if(addr >= 0x5C00 && addr <= 0x5FFF && _extendedRamMode <= 1) {
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PPUControlFlags flags = PPU::GetControlFlags();
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if(!flags.BackgroundEnabled && !flags.SpritesEnabled) {
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//Expansion RAM ($5C00-$5FFF, read/write)
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//Mode 0/1 - Not readable (returns open bus), can only be written while the PPU is rendering (otherwise, 0 is written)
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value = 0;
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}
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}
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BaseMapper::WriteRAM(addr, value);
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}
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