Comment adjustments; removed surperfluous keycodes
Cleaned up comments in Atari 8-bit headers. Internal keycodes (POKEY's KBCODE) were already #defined in atari.h, so didn't need a whole new set in _pokey.h.
This commit is contained in:
Bill Kendrick
parent
4b61c54092
commit
93a13315de
5 changed files with 282 additions and 220 deletions
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@ -18,7 +18,7 @@
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/* */
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/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
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/* 24-Jan-2011: Christian Krueger: Added defines for Antic instruction set */
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/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: More defines for registers */
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/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: More defines for registers */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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@ -44,7 +44,10 @@
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#ifndef __ANTIC_H
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#define __ANTIC_H
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/*****************************************************************************/
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/* Define a structure with the ANTIC coprocessor's register offsets */
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/*****************************************************************************/
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struct __antic {
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unsigned char dmactl; /* (W) direct memory access control */
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unsigned char chactl; /* (W) character mode control */
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@ -68,7 +71,10 @@ struct __antic {
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};
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/*****************************************************************************/
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/* DMACTL register options */
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/*****************************************************************************/
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/* Initialized to 0x22: DMA fetch, normal playfield, no PMG DMA, double-line PMGs */
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/* Playfield modes: */
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@ -96,7 +102,10 @@ struct __antic {
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#define DMACTL_DMA_FETCH 0x20
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/*****************************************************************************/
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/* CHACTL register options */
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/*****************************************************************************/
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/* Initialized to 2 (CHACTL_CHAR_NORMAL | CHACTL_INV_PRESENT) */
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/* Inverted (upside-down) characters */
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@ -109,27 +118,29 @@ struct __antic {
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#define CHACTL_INV_PRESENT 0x02 /* chars with high-bit are reverse-video */
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/* Register bits for NMIEN (enabling interrupts)
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** and NMIST (determining the cause for the NMI interrupt)
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*/
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/*****************************************************************************/
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/* Values for NMIEN (enabling interrupts) & NMIST (cause for the interrupt) */
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/*****************************************************************************/
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#define NMIEN_DLI 0x80
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/* Display List Interrupts
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** Called on a modeline when "DL_DLI" bit is set the ANTIC instruction,
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** and jumps through VDSLST vector.
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*/
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#define NMIEN_DLI 0x80
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#define NMIEN_VBI 0x40
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/* Vertical Blank Interrupt
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** Called during every vertical blank; see SYSVBV, VVBLKI, CRITIC, and VVBLKD,
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** as well as the SETVBV routine.
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*/
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#define NMIEN_VBI 0x40
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#define NMIEN_RESET 0x20
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/* [Reset] key pressed */
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#define NMIEN_RESET 0x20
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/*****************************************************************************/
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/* ANTIC instruction set */
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/*****************************************************************************/
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/* Absolute instructions (non mode lines) */
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#define DL_JMP ((unsigned char) 1)
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@ -144,28 +155,63 @@ struct __antic {
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#define DL_BLK7 ((unsigned char) 96)
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#define DL_BLK8 ((unsigned char) 112)
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/* Absolute instructions (mode lines) */
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/* Note: Actual width varies (e.g., 40 vs 32 vs 48) depending on normal vs narrow vs wide (overscan) playfield setting; see DMACTL */
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/* Note: Actual width varies (e.g., 40 vs 32 vs 48) depending on
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** normal vs narrow vs wide (overscan) playfield setting; see DMACTL
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*/
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/* Character modes (text, tile graphics, etc.) */
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#define DL_CHR40x8x1 ((unsigned char) 2) /* monochrome, 40 character & 8 scanlines per mode line (aka Atari BASIC GRAPHICS 0 via OS's CIO routines) */
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#define DL_CHR40x10x1 ((unsigned char) 3) /* monochrome, 40 character & 10 scanlines per mode line (like GR. 0, with descenders) */
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#define DL_CHR40x8x4 ((unsigned char) 4) /* colour, 40 character & 8 scanlines per mode line (GR. 12) */
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#define DL_CHR40x16x4 ((unsigned char) 5) /* colour, 40 character & 16 scanlines per mode line (GR. 13) */
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#define DL_CHR20x8x2 ((unsigned char) 6) /* colour (duochrome per character), 20 character & 8 scanlines per mode line (GR. 1) */
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#define DL_CHR20x16x2 ((unsigned char) 7) /* colour (duochrome per character), 20 character & 16 scanlines per mode line (GR. 2) */
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/* monochrome, 40 character & 8 scanlines per mode line (aka Atari BASIC GRAPHICS 0 via OS's CIO routines) */
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#define DL_CHR40x8x1 ((unsigned char) 2)
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/* monochrome, 40 character & 10 scanlines per mode line (like GR. 0, with descenders) */
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#define DL_CHR40x10x1 ((unsigned char) 3)
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/* colour, 40 character & 8 scanlines per mode line (GR. 12) */
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#define DL_CHR40x8x4 ((unsigned char) 4)
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/* colour, 40 character & 16 scanlines per mode line (GR. 13) */
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#define DL_CHR40x16x4 ((unsigned char) 5)
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/* colour (duochrome per character), 20 character & 8 scanlines per mode line (GR. 1) */
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#define DL_CHR20x8x2 ((unsigned char) 6)
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/* colour (duochrome per character), 20 character & 16 scanlines per mode line (GR. 2) */
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#define DL_CHR20x16x2 ((unsigned char) 7)
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/* Bitmap modes */
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#define DL_MAP40x8x4 ((unsigned char) 8) /* colour, 40 pixel & 8 scanlines per mode line (GR. 3) */
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#define DL_MAP80x4x2 ((unsigned char) 9) /* 'duochrome', 80 pixel & 4 scanlines per mode line (GR.4) */
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#define DL_MAP80x4x4 ((unsigned char) 10) /* colour, 80 pixel & 4 scanlines per mode line (GR.5) */
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#define DL_MAP160x2x2 ((unsigned char) 11) /* 'duochrome', 160 pixel & 2 scanlines per mode line (GR.6) */
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#define DL_MAP160x1x2 ((unsigned char) 12) /* 'duochrome', 160 pixel & 1 scanline per mode line (GR.14) */
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#define DL_MAP160x2x4 ((unsigned char) 13) /* 4 colours, 160 pixel & 2 scanlines per mode line (GR.7) */
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#define DL_MAP160x1x4 ((unsigned char) 14) /* 4 colours, 160 pixel & 1 scanline per mode line (GR.15) */
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#define DL_MAP320x1x1 ((unsigned char) 15) /* monochrome, 320 pixel & 1 scanline per mode line (GR.8) */
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/* colour, 40 pixel & 8 scanlines per mode line (GR. 3) */
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#define DL_MAP40x8x4 ((unsigned char) 8)
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/* 'duochrome', 80 pixel & 4 scanlines per mode line (GR.4) */
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#define DL_MAP80x4x2 ((unsigned char) 9)
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/* colour, 80 pixel & 4 scanlines per mode line (GR.5) */
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#define DL_MAP80x4x4 ((unsigned char) 10)
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/* 'duochrome', 160 pixel & 2 scanlines per mode line (GR.6) */
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#define DL_MAP160x2x2 ((unsigned char) 11)
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/* 'duochrome', 160 pixel & 1 scanline per mode line (GR.14) */
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#define DL_MAP160x1x2 ((unsigned char) 12)
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/* 4 colours, 160 pixel & 2 scanlines per mode line (GR.7) */
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#define DL_MAP160x2x4 ((unsigned char) 13)
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/* 4 colours, 160 pixel & 1 scanline per mode line (GR.15) */
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#define DL_MAP160x1x4 ((unsigned char) 14)
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/* monochrome, 320 pixel & 1 scanline per mode line (GR.8) */
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#define DL_MAP320x1x1 ((unsigned char) 15)
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/* Equivalents, for people familiar with Atari 8-bit OS */
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#define DL_GRAPHICS0 DL_CHR40x8x1
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#define DL_GRAPHICS1 DL_CHR20x8x2
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#define DL_GRAPHICS2 DL_CHR20x16x2
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@ -196,7 +242,7 @@ struct __antic {
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#define DL_LMS(x) ((unsigned char)((x) | 64)) /* Load Memory Scan (next two bytes must be the LSB/MSB of the data to load) */
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/* General modifier */
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#define DL_DLI(x) ((unsigned char)((x) | 128)) /* enable Display List Interrupt on this mode line; requires NMIEN be set to enable DLIs */
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#define DL_DLI(x) ((unsigned char)((x) | 128)) /* enable Display List Interrupt on this mode line */
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/* End of _antic.h */
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@ -13,7 +13,7 @@
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/* */
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/* */
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/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
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/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: More defines for registers */
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/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: More defines for registers */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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@ -39,7 +39,10 @@
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#ifndef __GTIA_H
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#define __GTIA_H
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/*****************************************************************************/
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/* Define a structure with the GTIA register offsets for write (W) */
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/*****************************************************************************/
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struct __gtia_write {
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unsigned char hposp0; /* 0x00: horizontal position of player 0 */
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unsigned char hposp1; /* 0x01: horizontal position of player 1 */
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@ -86,7 +89,10 @@ struct __gtia_write {
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};
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/* Values for SIZEP0-SIZEP3 and SIZEM registers: */
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/*****************************************************************************/
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/* (W) Values for SIZEP0-SIZEP3 and SIZEM registers: */
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/*****************************************************************************/
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#define PMG_SIZE_NORMAL 0x0 /* one color clock per pixel */
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#define PMG_SIZE_DOUBLE 0x1 /* two color clocks per pixel */
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#define PMG_SIZE_QUAD 0x2 /* four color clocks per pixel */
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@ -97,7 +103,10 @@ struct __gtia_write {
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** Bitwise OR (|) with 0x00 (darkest) through 0x0F (lightest) (only even values are unique)
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*/
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/* PRIOR register values */
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/*****************************************************************************/
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/* (W) PRIOR register values */
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/*****************************************************************************/
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#define PRIOR_P03_PF03 0x01 /* Players 0-3, then Playfields 0-3, then background */
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#define PRIOR_P01_PF03_P23 0x02 /* Players 0-1, then Playfields 0-3, then Players 2-3, then background */
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@ -106,35 +115,41 @@ struct __gtia_write {
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#define PRIOR_5TH_PLAYER 0x10 /* Four missiles combine to be a 5th player (uses COLPF3) */
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#define PRIOR_OVERLAP_3RD_COLOR 0x20 /* Overlap of players result in a 3rd color */
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/* Overlap of players 0 & 1 and of players 2 & 3 results in a third color,
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** the logical OR of the two players' colors;
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** Other overlaps (e.g., players 0 and 2) result in black (0x00).
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/* Causes overlap of players 0 & 1 and of players 2 & 3 to result in a third color,
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** the logical OR of the two players' colors, and other overlaps (e.g., players 0 and 2)
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** to result in black (0x00).
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*/
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#define PRIOR_OVERLAP_3RD_COLOR 0x20
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/*****************************************************************************/
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/* (W) GTIA special graphics mode options for GPRIOR */
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/*****************************************************************************/
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/* GTIA special graphics mode options */
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/* Pixels are 2 color clocks wide, and one scanline tall
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** (so 80x192 in normal playfield width).
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** May be used with both bitmap and character modelines.
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*/
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#define PRIOR_GFX_MODE_9 0x40
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/* 16 shade shades of the background (COLBK) hue;
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** Note: brightnesses other than 0 (darkest) in COLBK cause additional effects
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*/
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#define PRIOR_GFX_MODE_9 0x40
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#define PRIOR_GFX_MODE_10 0x80
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/* 9 color palette mode;
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** COLPM0 (acts as background) thru COLPM3, followed by COLPF0 thru COLPF3, and COLBK
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*/
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#define PRIOR_GFX_MODE_10 0x80
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#define PRIOR_GFX_MODE_11 0xC0
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/* 16 hues of the background (COLBK) brightness;
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** Note: hues other than 0 (greys) in COLBK caus additional effects
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*/
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#define PRIOR_GFX_MODE_11 0xC0
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/* VDELAY register values */
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/*****************************************************************************/
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/* (W) VDELAY register values */
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/*****************************************************************************/
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#define VDELAY_MISSILE0 0x01
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#define VDELAY_MISSILE1 0x02
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#define VDELAY_PLAYER3 0x80
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/* GRACTL register values */
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/*****************************************************************************/
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/* (W) GRACTL register values */
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/*****************************************************************************/
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#define GRACTL_MISSLES 0x01 /* enable missiles */
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#define GRACTL_PLAYERS 0x02 /* enable players */
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#define GRACTL_LATCH_TRIGGER_INPUTS 0x04
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/* "Latch" triggers; once pressed, will give a continuous
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** pressed input until this bit is cleared
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*/
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#define GRACTL_LATCH_TRIGGER_INPUTS 0x04
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/*****************************************************************************/
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/* Define a structure with the GTIA register offsets for read (R) */
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/*****************************************************************************/
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struct __gtia_read {
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unsigned char m0pf; /* 0x00: missile 0 to playfield collision */
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unsigned char m1pf; /* 0x01: missile 1 to playfield collision */
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@ -189,15 +209,22 @@ struct __gtia_read {
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};
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/* PAL register possible values */
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/*****************************************************************************/
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/* (R) PAL register possible values */
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/*****************************************************************************/
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/* Note: This only tells you whether the GTIA is PAL or NTSC; some NTSC
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** systems are modded with PAL ANTIC chips; testing VCOUNT limits can be
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** done to check for that. Seems like it's not possible to test for SECAM
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*/
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#define TV_STD_PAL 0x1
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#define TV_STD_NTSC 0xE
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/* Note: This only tells you whether the GTIA is PAL or NTSC; some NTSC systems are modded with PAL ANTIC chips; testing VCOUNT limits can be done to check for that */
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/* Note: Seems like it's not possible to test for SECAM */
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/* Reading console keys (Start, Select, Option) via CONSOL register: */
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/*****************************************************************************/
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/* Macros for reading console keys (Start/Select/Option) via CONSOL register */
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/*****************************************************************************/
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#define CONSOL_START(x) !((unsigned char)((x) & 1)) /* true if Start pressed */
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#define CONSOL_SELECT(x) !((unsigned char)((x) & 2)) /* true if Select pressed */
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/* The Peripheral Interface Adapter (PIA) chip provides parallel I/O */
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/* interfacing; it was used in Atari 400/800 and Commodore PET family of */
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/* computers, for joystick and interrupts. */
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/* - Sources; various + Wikpedia article on "Peripheral Interface Adapter" */
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/* Sources; various + Wikpedia article on "Peripheral Interface Adapter". */
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/* */
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/* */
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/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
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/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: Defines for registers */
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/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: Defines for registers */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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@ -48,7 +48,9 @@ struct __pia {
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};
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/*****************************************************************************/
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/* PORTA and PORTB register bits */
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/*****************************************************************************/
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/* See also: "JOY_xxx_MASK" in "atari.h" */
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@ -72,23 +74,23 @@ struct __pia {
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** LED control (1200XL model only) register (read/write):
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*/
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#define PORTB_OSROM 0x01
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/* If set, the built-in OS is enabled, and occupies the address range $C000-$FFFF
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** (except that the area $D000-$D7FF will only access the hardware registers.)
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** If clear, RAM is enabled in this area (again, save for the hole.)
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*/
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#define PORTB_OSROM 0x01
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#define PORTB_BASICROM 0x02
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/* If set, RAM is enabled for the address range $A000-$BFFF.
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** If clear, the built-in BASIC ROM is enabled at this address.
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** And if there is a cartridge installed in the computer, it makes no difference.
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*/
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#define PORTB_BASICROM 0x02
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#define PORTB_LED1 0x04
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#define PORTB_LED2 0x08
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/* If set, the corresponding LED is turned off. If clear, the LED will be on.
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** (1200XL only)
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*/
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#define PORTB_LED1 0x04
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#define PORTB_LED2 0x08
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/* On the XE series of computers, PORTB is a bank-selected memory control register (read/write): */
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#define PORTB_BANKSELECT3 0x08
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#define PORTB_BANKSELECT4 0x0C
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#define PORTB_BANKSWITCH_CPU 0x10
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#define PORTB_BANKSWITCH_ANTIC 0x20
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/* If set, the CPU and/or ANTIC chip will access bank-switched memory mapped to the
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** address range $4000-$7FFF.
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** If clear, the CPU and/or ANTIC will see normal memory in this region.
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*/
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#define PORTB_BANKSWITCH_CPU 0x10
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#define PORTB_BANKSWITCH_ANTIC 0x20
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#define PORTB_SELFTEST 0x80
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/* If set, RAM is enabled for the address range $5000-$57FF.
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** If clear, the self-test ROM (physically located at $D000-$D7FF, under the hardware registers)
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** is remapped to this memory area.
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*/
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#define PORTB_SELFTEST 0x80
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/*****************************************************************************/
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/* PACTL and PBCTL register bits */
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/*****************************************************************************/
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#define PxCTL_IRQ_ENABLE 0x01 /* (W) Peripheral A interrupt (IRQ) enable. */
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/* One equals enable. Set by the OS but available to the user; reset on powerup. */
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/* (W) Peripheral A interrupt (IRQ) enable.
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** One equals enable. Set by the OS but available to the user; reset on powerup.
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*/
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#define PxCTL_IRQ_ENABLE 0x01
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#define PxCTL_BIT1 0x02 /* "Set to zero" */
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/* "Set to zero" */
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#define PxCTL_BIT1 0x02
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#define PxCTL_ADDRESSING 0x04 /* (W) Controls PORTA addressing */
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/* One equals PORTA register; zero equals direction control register */
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/* (W) Controls PORTA addressing
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** One equals PORTA register; zero equals direction control register
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*/
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#define PxCTL_ADDRESSING 0x04
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#define PxCTL_BIT4 0x10 /* "Set to one" */
|
||||
#define PxCTL_BIT5 0x20 /* "Set to one" */
|
||||
#define PxCTL_BIT6 0x40 /* "Set to zero" */
|
||||
#define PxCTL_IRQ_STATUS 0x80 /* Peripheral interrupt (IRQ) status bit. */
|
||||
/* Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB. */
|
||||
|
||||
/* Peripheral interrupt (IRQ) status bit.
|
||||
** Set by Peripherals (PORTA / PORTB). Reset by reading PORTA / PORTB.
|
||||
*/
|
||||
#define PxCTL_IRQ_STATUS 0x80
|
||||
|
||||
|
||||
/* PACTL-specific register bit */
|
||||
|
||||
#define PACTL_MOTOR_CONTROL 0x08 /* (W) Peripheral motor control line */
|
||||
/* Turn the cassette on or off; zero equals on) */
|
||||
/* (W) Peripheral motor control line
|
||||
** Turn the cassette on or off; zero equals on)
|
||||
*/
|
||||
#define PACTL_MOTOR_CONTROL 0x08
|
||||
|
||||
|
||||
/* PBCTL-specific register bit */
|
||||
|
||||
#define PBCTL_PERIPH_CMD_IDENT 0x08 /* Peripheral command identification (serial bus command) */
|
||||
|
||||
/* Peripheral command identification (serial bus command) */
|
||||
#define PBCTL_PERIPH_CMD_IDENT 0x08
|
||||
|
||||
|
||||
/* End of _pia.h */
|
||||
|
|
|
|||
177
include/_pokey.h
177
include/_pokey.h
|
|
@ -14,7 +14,7 @@
|
|||
/* */
|
||||
/* */
|
||||
/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
|
||||
/* 2019-01-14: Bill Kendrick <nbs@sonic.net>: More defines for registers */
|
||||
/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: More defines for registers */
|
||||
/* */
|
||||
/* */
|
||||
/* This software is provided 'as-is', without any expressed or implied */
|
||||
|
|
@ -43,7 +43,10 @@
|
|||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Define a structure with the POKEY register offsets for write (W) */
|
||||
/*****************************************************************************/
|
||||
|
||||
struct __pokey_write {
|
||||
unsigned char audf1; /* audio channel #1 frequency */
|
||||
unsigned char audc1; /* audio channel #1 control */
|
||||
|
|
@ -69,8 +72,9 @@ struct __pokey_write {
|
|||
};
|
||||
|
||||
|
||||
|
||||
/* AUDC1-4 register values */
|
||||
/*****************************************************************************/
|
||||
/* (W) AUDC1-4 register values */
|
||||
/*****************************************************************************/
|
||||
|
||||
/* Meaningful values for the distortion bits.
|
||||
** The first process is to divide the clock value by the frequency,
|
||||
|
|
@ -91,7 +95,9 @@ struct __pokey_write {
|
|||
#define AUDC_VOLUME_ONLY 0x10
|
||||
|
||||
|
||||
/* AUDCTL register values */
|
||||
/*****************************************************************************/
|
||||
/* (W) AUDCTL register values */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define AUDCTL_CLOCKBASE_15HZ 0x01 /* Switch main clock base from 64 KHz to 15 KHz */
|
||||
#define AUDCTL_HIGHPASS_CHAN2 0x02 /* Insert high pass filter into channel two, clocked by channel four */
|
||||
|
|
@ -103,7 +109,9 @@ struct __pokey_write {
|
|||
#define AUDCTL_9BIT_POLY 0x80 /* Makes the 17 bit poly counter into nine bit poly (see also: RANDOM) */
|
||||
|
||||
|
||||
/* IRQEN register values */
|
||||
/*****************************************************************************/
|
||||
/* (W) IRQEN register values */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define IRQEN_TIMER_1 0x01 /* The POKEY timer one interrupt is enabled */
|
||||
#define IRQEN_TIMER_2 0x02 /* The POKEY timer two interrupt is enabled */
|
||||
|
|
@ -115,49 +123,57 @@ struct __pokey_write {
|
|||
#define IRQEN_BREAK_KEY 0x80 /* The BREAK key is enabled */
|
||||
|
||||
|
||||
/* SKCTL register values */
|
||||
/*****************************************************************************/
|
||||
/* (W) SKCTL register values */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define SKCTL_KEYBOARD_DEBOUNCE 0x01 /* Enable keyboard debounce circuits */
|
||||
#define SKCTL_KEYBOARD_SCANNING 0x02 /* Enable keyboard scanning circuit */
|
||||
|
||||
#define SKCTL_FAST_POT_SCAN 0x04 /* Fast pot scan */
|
||||
/* The pot scan counter completes its sequence in two TV line times instead of
|
||||
/* Fast pot scan
|
||||
** The pot scan counter completes its sequence in two TV line times instead of
|
||||
** one frame time (228 scan lines). Not as accurate as the normal pot scan
|
||||
*/
|
||||
#define SKCTL_FAST_POT_SCAN 0x04
|
||||
|
||||
#define SKCTL_TWO_TONE_MODE 0x08 /* POKEY two-tone mode */
|
||||
/* Serial output is transmitted as a two-tone signal rather than a logic true/false. */
|
||||
/* POKEY two-tone mode
|
||||
** Serial output is transmitted as a two-tone signal rather than a logic true/false.
|
||||
*/
|
||||
#define SKCTL_TWO_TONE_MODE 0x08
|
||||
|
||||
/* Force break (serial output to zero) */
|
||||
#define SKCTL_FORCE_BREAK 0x80
|
||||
|
||||
|
||||
/* Bits 4, 5, and 6 of SKCTL set Serial Mode Control: */
|
||||
|
||||
#define SKCTL_SER_MODE_TX_EXT_RX_EXT 0x00
|
||||
/* Trans. & Receive rates set by external clock; Also internal clock phase reset to zero. */
|
||||
#define SKCTL_SER_MODE_TX_EXT_RX_EXT 0x00
|
||||
|
||||
#define SKCTL_SER_MODE_TX_EXT_RX_ASYNC 0x10
|
||||
/* Trans. rate set by external clock; Receive asynch. (ch. 4) (CH3 and CH4). */
|
||||
#define SKCTL_SER_MODE_TX_EXT_RX_ASYNC 0x10
|
||||
|
||||
#define SKCTL_SER_MODE_TX_CH4_RX_CH4_BIDIR 0x20
|
||||
/* Trans. & Receive rates set by Chan. 4; Chan. 4 output on Bi-Direct. clock line. */
|
||||
#define SKCTL_SER_MODE_TX_CH4_RX_CH4_BIDIR 0x20
|
||||
|
||||
/* N.B.: Bit combination 0,1,1 not useful */
|
||||
|
||||
#define SKCTL_SER_MODE_TX_CH4_RX_EXT 0x40
|
||||
/* Trans. rate set by Chan. 4; Receive rate set by external clock. */
|
||||
#define SKCTL_SER_MODE_TX_CH4_RX_EXT 0x40
|
||||
|
||||
/* N.B.: Bit combination 1,0,1 not useful */
|
||||
|
||||
#define SKCTL_SER_MODE_TX_CH2_RX_CH4_BIDIR 0x60
|
||||
/* Trans. rate set by Chan. 2; Receive rate set by Chan. 4; Chan. 4 out on Bi-Direct. clock line. */
|
||||
#define SKCTL_SER_MODE_TX_CH2_RX_CH4_BIDIR 0x60
|
||||
|
||||
#define SKCTL_SER_MODE_TX_CH4_RX_ASYNC 0x70
|
||||
/* Trans. rate set by Chan. 2; Receive asynch. (chan 3 & 4); Bi-Direct. clock not used (tri-state condition). */
|
||||
#define SKCTL_SER_MODE_TX_CH4_RX_ASYNC 0x70
|
||||
|
||||
|
||||
#define SKCTL_FORCE_BREAK 0x80 /* Force break (serial output to zero) */
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Define a structure with the POKEY register offsets for read (R) */
|
||||
/*****************************************************************************/
|
||||
|
||||
struct __pokey_read {
|
||||
unsigned char pot0; /* paddle 0 value */
|
||||
unsigned char pot1; /* paddle 1 value */
|
||||
|
|
@ -178,7 +194,10 @@ struct __pokey_read {
|
|||
};
|
||||
|
||||
|
||||
/* SKSTAT register values */
|
||||
/*****************************************************************************/
|
||||
/* (R) SKSTAT register values */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define SKSTAT_SERIN_SHIFTREG_BUSY 0x02 /* Serial input shift register busy */
|
||||
#define SKSTAT_LASTKEY_PRESSED 0x04 /* the last key is still pressed */
|
||||
#define SKSTAT_SHIFTKEY_PRESSED 0x08 /* the [Shift] key is pressed */
|
||||
|
|
@ -188,120 +207,14 @@ struct __pokey_read {
|
|||
#define SKSTAT_INPUT_FRAMEERROR 0x80 /* Serial data input frame error caused by missing or extra bits. Reset latches as above. */
|
||||
|
||||
|
||||
/* KBCODE internal keyboard codes for Atari 8-bit computers*/
|
||||
|
||||
/* Defined below in the order the keys appear on a 1200XL keyboard,
|
||||
** from top left to bottom right.
|
||||
** Note: Numerous Shift+Ctrl+key combos are unavailable.
|
||||
** (Source: "Compute!'s Thrid Book of Atari", "Reading the Keyboard Codes")
|
||||
/* KBCODE, internal keyboard codes for Atari 8-bit computers,
|
||||
** are #defined as "KEY_..." in "atari.h".
|
||||
** Note some keys are not read via KBCODE:
|
||||
** - Reset
|
||||
** - Start, Select, and Option; see CONSOL in "gtia.h"
|
||||
** - Break
|
||||
*/
|
||||
|
||||
#define KEYCODE_NONE 255 /* No key pressed (but also Ctrl+Shift+A) */
|
||||
|
||||
|
||||
/* Special keys: */
|
||||
|
||||
/* N.B. Reset key not handled like other keys */
|
||||
|
||||
/* N.B. Select, Start, and Option console keys not handled like other keys;
|
||||
** see CONSOL register in GTIA
|
||||
*/
|
||||
|
||||
/* Fn (function) keys only available on 1200XL */
|
||||
#define KEYCODE_F1 3
|
||||
#define KEYCODE_F2 4
|
||||
#define KEYCODE_F3 19
|
||||
#define KEYCODE_F4 20
|
||||
|
||||
/* HELP key only available on XL/XE series */
|
||||
#define KEYCODE_HELP 17
|
||||
|
||||
/* N.B. Break key not handled like other keys */
|
||||
|
||||
|
||||
/* Keyboard top row */
|
||||
|
||||
#define KEYCODE_ESC 28
|
||||
#define KEYCODE_1 31
|
||||
#define KEYCODE_2 30
|
||||
#define KEYCODE_3 26
|
||||
#define KEYCODE_4 24
|
||||
#define KEYCODE_5 29
|
||||
#define KEYCODE_6 27
|
||||
#define KEYCODE_7 51
|
||||
#define KEYCODE_8 53
|
||||
#define KEYCODE_9 48
|
||||
#define KEYCODE_0 50
|
||||
#define KEYCODE_LT 54
|
||||
#define KEYCODE_GT 55
|
||||
#define KEYCODE_BKSPC 52
|
||||
|
||||
|
||||
/* Keyboard second row */
|
||||
|
||||
#define KEYCODE_TAB 44
|
||||
#define KEYCODE_Q 47
|
||||
#define KEYCODE_W 46
|
||||
#define KEYCODE_E 42
|
||||
#define KEYCODE_R 40
|
||||
#define KEYCODE_T 45
|
||||
#define KEYCODE_Y 43
|
||||
#define KEYCODE_U 11
|
||||
#define KEYCODE_I 13
|
||||
#define KEYCODE_O 8
|
||||
#define KEYCODE_P 10
|
||||
#define KEYCODE_MINUS 14
|
||||
#define KEYCODE_EQUALS 15
|
||||
#define KEYCODE_RETURN 12
|
||||
|
||||
|
||||
/* Keyboard third row */
|
||||
|
||||
#define KEYCODE_CTRL 128 /* binary OR'd */
|
||||
/* N.B. Cannot read Ctrl key alone */
|
||||
|
||||
#define KEYCODE_A 63
|
||||
#define KEYCODE_S 62
|
||||
#define KEYCODE_D 58
|
||||
#define KEYCODE_F 56
|
||||
#define KEYCODE_G 61
|
||||
#define KEYCODE_H 57
|
||||
#define KEYCODE_J 1
|
||||
#define KEYCODE_K 5
|
||||
#define KEYCODE_L 0
|
||||
#define KEYCODE_SEMICOLON 2
|
||||
#define KEYCODE_PLUS 6
|
||||
#define KEYCODE_ASTERISK 7
|
||||
#define KEYCODE_CAPS 60
|
||||
|
||||
|
||||
/* Keyboard bottom row */
|
||||
|
||||
#define KEYCODE_SHIFT 64 /* binary OR'd */
|
||||
/* N.B. Cannot read Shift key alone via KBCODE;
|
||||
** instead, check "Shfit key press" bit of SKSTAT register
|
||||
*/
|
||||
|
||||
#define KEYCODE_Z 23
|
||||
#define KEYCODE_X 22
|
||||
#define KEYCODE_C 18
|
||||
#define KEYCODE_V 16
|
||||
#define KEYCODE_B 21
|
||||
#define KEYCODE_N 35
|
||||
#define KEYCODE_M 37
|
||||
#define KEYCODE_COMMA 32
|
||||
#define KEYCODE_PERIOD 34
|
||||
#define KEYCODE_SLASH 38
|
||||
#define KEYCODE_FUJI 39 /* (as seen on 400/800) */
|
||||
#define KEYCODE_INVERSE 39 /* (alternative name; as seen on XL/XE) */
|
||||
|
||||
/* N.B. No way to tell left from right Shift keys */
|
||||
|
||||
|
||||
/* Keyboard Space key */
|
||||
|
||||
#define KEYCODE_SPACE 33
|
||||
|
||||
|
||||
/* End of _pokey.h */
|
||||
#endif /* #ifndef __POKEY_H */
|
||||
|
|
|
|||
|
|
@ -6,9 +6,10 @@
|
|||
/* */
|
||||
/* */
|
||||
/* */
|
||||
/* (C) 2000-2018 Mark Keates <markk@dendrite.co.uk> */
|
||||
/* (C) 2000-2019 Mark Keates <markk@dendrite.co.uk> */
|
||||
/* Freddy Offenga <taf_offenga@yahoo.com> */
|
||||
/* Christian Groessler <chris@groessler.org> */
|
||||
/* Bill Kendrick <nbs@sonic.net> */
|
||||
/* */
|
||||
/* */
|
||||
/* This software is provided 'as-is', without any expressed or implied */
|
||||
|
|
@ -44,7 +45,10 @@
|
|||
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Character codes */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define CH_DELCHR 0xFE /* delete char under the cursor */
|
||||
#define CH_ENTER 0x9B
|
||||
#define CH_ESC 0x1B
|
||||
|
|
@ -87,7 +91,9 @@
|
|||
#define CH_VLINE 0x7C
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Color definitions */
|
||||
/*****************************************************************************/
|
||||
|
||||
/* Make a GTIA color value */
|
||||
#define _gtia_mkcolor(hue,lum) (((hue) << 4) | ((lum) << 1))
|
||||
|
|
@ -155,7 +161,11 @@
|
|||
#define TGI_COLOR_LIGHTBLUE COLOR_LIGHTBLUE
|
||||
#define TGI_COLOR_GRAY3 COLOR_GRAY3
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Masks for joy_read */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define JOY_UP_MASK 0x01
|
||||
#define JOY_DOWN_MASK 0x02
|
||||
#define JOY_LEFT_MASK 0x04
|
||||
|
|
@ -165,7 +175,11 @@
|
|||
#define JOY_FIRE_MASK JOY_BTN_1_MASK
|
||||
#define JOY_FIRE(v) ((v) & JOY_FIRE_MASK)
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Keyboard values returned by kbcode / CH */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define KEY_NONE ((unsigned char) 0xFF)
|
||||
|
||||
#define KEY_0 ((unsigned char) 0x32)
|
||||
|
|
@ -226,15 +240,26 @@
|
|||
#define KEY_INVERSE ((unsigned char) 0x27)
|
||||
#define KEY_HELP ((unsigned char) 0x11)
|
||||
|
||||
/* Function keys only exist on the 1200XL model. */
|
||||
#define KEY_F1 ((unsigned char) 0x03)
|
||||
#define KEY_F2 ((unsigned char) 0x04)
|
||||
#define KEY_F3 ((unsigned char) 0x13)
|
||||
#define KEY_F4 ((unsigned char) 0x14)
|
||||
|
||||
/* N.B. Cannot read Ctrl key alone */
|
||||
#define KEY_CTRL ((unsigned char) 0x80)
|
||||
|
||||
/* N.B. Cannot read Shift key alone via KBCODE;
|
||||
** instead, check "Shfit key press" bit of SKSTAT register.
|
||||
** Also, no way to tell left Shift from right Shift.
|
||||
*/
|
||||
#define KEY_SHIFT ((unsigned char) 0x40)
|
||||
|
||||
/* Composed keys */
|
||||
|
||||
/* Composed keys
|
||||
** (Other combinations are possible, including Shift+Ctrl+key,
|
||||
** though not all such combinations are available.)
|
||||
*/
|
||||
|
||||
#define KEY_EXCLAMATIONMARK (KEY_1 | KEY_SHIFT)
|
||||
#define KEY_QUOTE (KEY_2 | KEY_SHIFT)
|
||||
|
|
@ -262,18 +287,29 @@
|
|||
#define KEY_LEFT (KEY_PLUS | KEY_CTRL)
|
||||
#define KEY_RIGHT (KEY_ASTERISK | KEY_CTRL)
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Color register functions */
|
||||
/*****************************************************************************/
|
||||
|
||||
extern void __fastcall__ _setcolor (unsigned char color_reg, unsigned char hue, unsigned char luminace);
|
||||
extern void __fastcall__ _setcolor_low (unsigned char color_reg, unsigned char color_value);
|
||||
extern unsigned char __fastcall__ _getcolor (unsigned char color_reg);
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Other screen functions */
|
||||
/*****************************************************************************/
|
||||
|
||||
extern int __fastcall__ _graphics (unsigned char mode); /* mode value same as in BASIC */
|
||||
extern void __fastcall__ _scroll (signed char numlines);
|
||||
/* numlines > 0 scrolls up */
|
||||
/* numlines < 0 scrolls down */
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Misc. functions */
|
||||
/*****************************************************************************/
|
||||
|
||||
extern unsigned char get_ostype(void); /* get ROM version */
|
||||
extern unsigned char get_tv(void); /* get TV system */
|
||||
extern void _save_vecs(void); /* save system vectors */
|
||||
|
|
@ -281,7 +317,11 @@ extern void _rest_vecs(void); /* restore system vectors */
|
|||
extern char *_getdefdev(void); /* get default floppy device */
|
||||
extern unsigned char _is_cmdline_dos(void); /* does DOS support command lines */
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Global variables */
|
||||
/*****************************************************************************/
|
||||
|
||||
extern unsigned char _dos_type; /* the DOS flavour */
|
||||
#ifndef __ATARIXL__
|
||||
extern void atr130_emd[];
|
||||
|
|
@ -335,7 +375,11 @@ extern void atrx15_tgi[];
|
|||
extern void atrx15p2_tgi[];
|
||||
#endif
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* get_ostype return value defines (for explanation, see ostype.s) */
|
||||
/*****************************************************************************/
|
||||
|
||||
/* masks */
|
||||
#define AT_OS_TYPE_MAIN 7
|
||||
#define AT_OS_TYPE_MINOR (7 << 3)
|
||||
|
|
@ -358,11 +402,19 @@ extern void atrx15p2_tgi[];
|
|||
#define AT_OS_XLXE_3 3
|
||||
#define AT_OS_XLXE_4 4
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* get_tv return values */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define AT_NTSC 0
|
||||
#define AT_PAL 1
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* valid _dos_type values */
|
||||
/*****************************************************************************/
|
||||
|
||||
#define SPARTADOS 0
|
||||
#define REALDOS 1
|
||||
#define BWDOS 2
|
||||
|
|
@ -372,7 +424,11 @@ extern void atrx15p2_tgi[];
|
|||
#define MYDOS 6
|
||||
#define NODOS 255
|
||||
|
||||
/* Define hardware */
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Define hardware and where they're mapped in memory */
|
||||
/*****************************************************************************/
|
||||
|
||||
#include <_gtia.h>
|
||||
#define GTIA_READ (*(struct __gtia_read*)0xD000)
|
||||
#define GTIA_WRITE (*(struct __gtia_write*)0xD000)
|
||||
|
|
@ -389,7 +445,11 @@ extern void atrx15p2_tgi[];
|
|||
#include <_antic.h>
|
||||
#define ANTIC (*(struct __antic*)0xD400)
|
||||
|
||||
/* device control block */
|
||||
|
||||
/*****************************************************************************/
|
||||
/* Device control block */
|
||||
/*****************************************************************************/
|
||||
|
||||
struct __dcb {
|
||||
unsigned char device; /* device id */
|
||||
unsigned char unit; /* unit number */
|
||||
|
|
@ -404,7 +464,11 @@ struct __dcb {
|
|||
};
|
||||
#define DCB (*(struct __dcb *)0x300)
|
||||
|
||||
|
||||
/*****************************************************************************/
|
||||
/* I/O control block */
|
||||
/*****************************************************************************/
|
||||
|
||||
struct __iocb {
|
||||
unsigned char handler; /* handler index number (0xff free) */
|
||||
unsigned char drive; /* device number (drive) */
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue