Sour
|
cbd08a3767
|
PPU: Implemented vram address translation + fixed issues with H/V flags/irqs
|
2019-03-01 22:24:18 -05:00 |
|
Sour
|
002cda8cf6
|
PPU: Sprite interlace flag support (untested)
|
2019-02-24 19:21:19 -05:00 |
|
Sour
|
b9aedafd32
|
PPU: Offset per tile mode support (mode 2/4/6)
|
2019-02-24 18:45:47 -05:00 |
|
Sour
|
75dee8b8e4
|
PPU: Fixed mode 5 when using 16x16 tiles
|
2019-02-24 11:14:24 -05:00 |
|
Sour
|
e80d6fcd7f
|
PPU: Mode 6 support (incomplete)
|
2019-02-24 10:30:19 -05:00 |
|
Sour
|
21791170f4
|
PPU: Fixed VRAM read behavior
|
2019-02-24 09:38:22 -05:00 |
|
Sour
|
073e7b2bf3
|
PPU: Code refactoring
|
2019-02-24 01:30:55 -05:00 |
|
Sour
|
16cc0653e9
|
PPU: Direct color mode support
|
2019-02-24 01:11:26 -05:00 |
|
Sour
|
85f1333c3d
|
PPU: Support for mode 5, hires, interlace, and overscan mode
|
2019-02-23 21:39:35 -05:00 |
|
Sour
|
19a6663ed9
|
PPU: Mode 7 Ext BG mode
|
2019-02-23 16:04:04 -05:00 |
|
Sour
|
39ae565aa1
|
PPU: Mode 7 support
|
2019-02-23 15:40:32 -05:00 |
|
Sour
|
86326215fd
|
PPU: Precalculate some flags through templates for performance
|
2019-02-23 08:54:46 -05:00 |
|
Sour
|
fef78e5802
|
PPU: Support for 16x16 tiles
|
2019-02-23 01:28:41 -05:00 |
|
Sour
|
4b2697612e
|
PPU: Minor refactoring
|
2019-02-22 22:35:53 -05:00 |
|
Sour
|
f028518664
|
PPU: Implement brightness control
|
2019-02-22 22:31:20 -05:00 |
|
Sour
|
dbfed2bb46
|
PPU: Implemented color window
|
2019-02-22 22:19:20 -05:00 |
|
Sour
|
a009e899a2
|
PPU: Window support (except color window)
|
2019-02-22 20:15:55 -05:00 |
|
Sour
|
7f5d93d680
|
PPU: Minor refactoring
|
2019-02-22 18:41:43 -05:00 |
|
Sour
|
596d6b9ce8
|
PPU: Optimizations (runs ~20% faster)
|
2019-02-21 22:40:08 -05:00 |
|
Sour
|
bcf41aca83
|
PPU: Implemented second PPU status flag ($213F)
|
2019-02-21 18:11:31 -05:00 |
|
Sour
|
d73ca5bf82
|
PPU: Implemented multiply register
|
2019-02-21 08:15:00 -05:00 |
|
Sour
|
68e7617c95
|
PPU: Implemented VRAM/CGRAM reads + H/V offset data latches
+ Implemented work ram read register
|
2019-02-21 07:27:47 -05:00 |
|
Sour
|
37b501122f
|
PPU: Mosaic effect support
|
2019-02-20 17:39:14 -05:00 |
|
Sour
|
77ac5a50dc
|
PPU: Minor refactoring
|
2019-02-19 23:37:27 -05:00 |
|
Sour
|
de9e71eabf
|
PPU: Improved color math support
|
2019-02-19 23:35:43 -05:00 |
|
Sour
|
4264779b26
|
PPU: Fixed palette selection for BG2/3/4 in mode 0
|
2019-02-19 22:44:05 -05:00 |
|
Sour
|
b5fe44a037
|
PPU: Implement basic sprite time/range over flags, forced vblank flag
+ Stub for IO port registers
|
2019-02-19 18:01:27 -05:00 |
|
Sour
|
06a9babfd7
|
PPU: Basic scroll offset support (WIP)
|
2019-02-19 17:23:21 -05:00 |
|
Sour
|
d88a0b5086
|
PPU: Scanline renderer (wip) - better priority & subscreen/color math logic
|
2019-02-19 01:26:48 -05:00 |
|
Sour
|
9f5bf4a37b
|
PPU: Scanline renderer (wip)
|
2019-02-18 22:27:22 -05:00 |
|
Sour
|
17bb339fec
|
PPU: Very incomplete color math support
|
2019-02-17 23:53:19 -05:00 |
|
Sour
|
7ccfc99a62
|
PPU: Fixed tile CHR address for layers 1/3 + implemented "layer/oam enabled" flag
|
2019-02-17 23:26:49 -05:00 |
|
Sour
|
20059ae975
|
PPU: Basic support for rendering sprites
|
2019-02-17 22:44:57 -05:00 |
|
Sour
|
a19013da76
|
PPU: Implemented OAM writes
|
2019-02-17 21:09:33 -05:00 |
|
Sour
|
b806b3d96e
|
Core: Added SNES controller support
|
2019-02-17 20:29:29 -05:00 |
|
Sour
|
aaf147b53b
|
Refactor internal CPU registers + implement division register
|
2019-02-17 15:37:31 -05:00 |
|
Sour
|
93e8fd9d5e
|
Core: Fixed for memory mappings, implemented multiplication register, added logging to help debugging missing functionalities
|
2019-02-17 14:42:35 -05:00 |
|
Sour
|
0757ccefa6
|
PPU: Horizontal/vertical IRQ timer support
|
2019-02-17 01:09:47 -05:00 |
|
Sour
|
0681419841
|
PPU: Added very basic support for other display modes
|
2019-02-17 00:32:41 -05:00 |
|
Sour
|
e257db4def
|
Fixed memory leaks
|
2019-02-16 01:16:57 -05:00 |
|
Sour
|
6d22b920b8
|
Debugger: Added hex editor
|
2019-02-15 21:33:13 -05:00 |
|
Sour
|
0f657ccf63
|
DMA: Refactoring + improvements/fixes
|
2019-02-15 00:08:50 -05:00 |
|
Sour
|
f0bd820264
|
PPU: Added barebones implementation of PPU/DMA to allow test roms to display their result on screen
|
2019-02-13 23:03:01 -05:00 |
|
Sour
|
69cf69fa6f
|
PPU: Implement some of the registers
|
2019-02-13 18:44:39 -05:00 |
|
Sour
|
522372a365
|
Fixed addressing bugs, added PPU stub, improved trace logger output, split CPU instructions to another file
|
2019-02-13 13:32:51 -05:00 |
|