Sour
|
b6f1f54888
|
PPU: Apply brightness control to forced blank (fixes issues in some games)
|
2019-03-06 22:25:14 -05:00 |
|
Sour
|
d56306d1e9
|
PPU: Fixed some effects not being applied to the right-most pixels
|
2019-03-06 22:24:35 -05:00 |
|
Sour
|
3cc2aee494
|
PPU: Fixed mode 4 lookup logic
|
2019-03-04 19:13:12 -05:00 |
|
Sour
|
4139f6dca8
|
CPU/PPU: Improved timing and implemented catch-up in PPU when registers are written to in the middle of a scanline
|
2019-03-04 17:49:14 -05:00 |
|
Sour
|
03d6be7ac7
|
PPU: Offset-per-tile mode fixes
|
2019-03-03 18:05:58 -05:00 |
|
Sour
|
706ef2f6e4
|
Debugger: Added basic tilemap viewer
|
2019-03-03 16:34:23 -05:00 |
|
Sour
|
ce7c2f7ee8
|
PPU: Fixed Mode 4 BG2 BPP config
|
2019-03-03 01:01:30 -05:00 |
|
Sour
|
12bd090daf
|
PPU: Fixed sprite wrapping behavior at the bottom/top of the screen
|
2019-03-03 00:31:28 -05:00 |
|
Sour
|
c138e20a06
|
PPU: Fixed hi-res display for modes other than 5/6
|
2019-03-02 21:37:32 -05:00 |
|
Sour
|
3cfb3f7f25
|
PPU: Improved hires/interlace support (allow mid-screen changes)
|
2019-03-02 18:00:27 -05:00 |
|
Sour
|
37c9996e7b
|
PPU: Fixed sprite draw order/priority and implemented priority activation bit
|
2019-03-02 13:51:42 -05:00 |
|
Sour
|
b46ef705f8
|
PPU: Fixed sprites being displayed with a 1 scanline offset
|
2019-03-02 11:15:51 -05:00 |
|
Sour
|
28a151e00d
|
PPU: Fixed sprite range/time flags and hblank flag
|
2019-03-02 00:11:42 -05:00 |
|
Sour
|
672e4422f7
|
PPU: Fixed NMI scanline in 239-line mode
|
2019-03-01 23:10:22 -05:00 |
|
Sour
|
cbd08a3767
|
PPU: Implemented vram address translation + fixed issues with H/V flags/irqs
|
2019-03-01 22:24:18 -05:00 |
|
Sour
|
8502581a1d
|
Debugger: Breakpoint support
|
2019-03-01 20:27:49 -05:00 |
|
Sour
|
4ee2c42663
|
Memory manager refactoring
|
2019-02-26 22:27:09 -05:00 |
|
Sour
|
002cda8cf6
|
PPU: Sprite interlace flag support (untested)
|
2019-02-24 19:21:19 -05:00 |
|
Sour
|
76d1aa82e5
|
PPU: Fixed obj/color window mask logic not being applied correctly
|
2019-02-24 19:02:21 -05:00 |
|
Sour
|
b9aedafd32
|
PPU: Offset per tile mode support (mode 2/4/6)
|
2019-02-24 18:45:47 -05:00 |
|
Sour
|
5a45665d74
|
PPU: Fixed negative X sprite display logic
|
2019-02-24 13:09:22 -05:00 |
|
Sour
|
75dee8b8e4
|
PPU: Fixed mode 5 when using 16x16 tiles
|
2019-02-24 11:14:24 -05:00 |
|
Sour
|
e80d6fcd7f
|
PPU: Mode 6 support (incomplete)
|
2019-02-24 10:30:19 -05:00 |
|
Sour
|
3aa008b831
|
PPU: Fixed out-of-bounds memory access in mode 7 with negative offsets
|
2019-02-24 10:29:11 -05:00 |
|
Sour
|
0431e1931d
|
PPU: Fixed sprite display when vertical mirroring is enabled
|
2019-02-24 10:02:22 -05:00 |
|
Sour
|
21791170f4
|
PPU: Fixed VRAM read behavior
|
2019-02-24 09:38:22 -05:00 |
|
Sour
|
073e7b2bf3
|
PPU: Code refactoring
|
2019-02-24 01:30:55 -05:00 |
|
Sour
|
16cc0653e9
|
PPU: Direct color mode support
|
2019-02-24 01:11:26 -05:00 |
|
Sour
|
85f1333c3d
|
PPU: Support for mode 5, hires, interlace, and overscan mode
|
2019-02-23 21:39:35 -05:00 |
|
Sour
|
19a6663ed9
|
PPU: Mode 7 Ext BG mode
|
2019-02-23 16:04:04 -05:00 |
|
Sour
|
39ae565aa1
|
PPU: Mode 7 support
|
2019-02-23 15:40:32 -05:00 |
|
Sour
|
86326215fd
|
PPU: Precalculate some flags through templates for performance
|
2019-02-23 08:54:46 -05:00 |
|
Sour
|
fef78e5802
|
PPU: Support for 16x16 tiles
|
2019-02-23 01:28:41 -05:00 |
|
Sour
|
4b2697612e
|
PPU: Minor refactoring
|
2019-02-22 22:35:53 -05:00 |
|
Sour
|
f028518664
|
PPU: Implement brightness control
|
2019-02-22 22:31:20 -05:00 |
|
Sour
|
dbfed2bb46
|
PPU: Implemented color window
|
2019-02-22 22:19:20 -05:00 |
|
Sour
|
a009e899a2
|
PPU: Window support (except color window)
|
2019-02-22 20:15:55 -05:00 |
|
Sour
|
7f5d93d680
|
PPU: Minor refactoring
|
2019-02-22 18:41:43 -05:00 |
|
Sour
|
02425d7453
|
DMA: Added delay values for DMA/HDMA
|
2019-02-21 23:35:51 -05:00 |
|
Sour
|
596d6b9ce8
|
PPU: Optimizations (runs ~20% faster)
|
2019-02-21 22:40:08 -05:00 |
|
Sour
|
0b7ad7c0db
|
CPU: Added all idle cycles + added DRAM refresh delay
|
2019-02-21 22:10:41 -05:00 |
|
Sour
|
bcf41aca83
|
PPU: Implemented second PPU status flag ($213F)
|
2019-02-21 18:11:31 -05:00 |
|
Sour
|
93b730b390
|
PPU: Fixed V/H read toggle
|
2019-02-21 17:45:11 -05:00 |
|
Sour
|
d73ca5bf82
|
PPU: Implemented multiply register
|
2019-02-21 08:15:00 -05:00 |
|
Sour
|
68e7617c95
|
PPU: Implemented VRAM/CGRAM reads + H/V offset data latches
+ Implemented work ram read register
|
2019-02-21 07:27:47 -05:00 |
|
Sour
|
37b501122f
|
PPU: Mosaic effect support
|
2019-02-20 17:39:14 -05:00 |
|
Sour
|
30cb4f1dcc
|
PPU: Fixed out-of-bounds memory writes
|
2019-02-20 00:43:40 -05:00 |
|
Sour
|
77ac5a50dc
|
PPU: Minor refactoring
|
2019-02-19 23:37:27 -05:00 |
|
Sour
|
de9e71eabf
|
PPU: Improved color math support
|
2019-02-19 23:35:43 -05:00 |
|
Sour
|
4264779b26
|
PPU: Fixed palette selection for BG2/3/4 in mode 0
|
2019-02-19 22:44:05 -05:00 |
|